- 您现在的位置：买卖IC网 > PDF目录189259 > NT1GT64U8HA0B-3C (NANYA TECHNOLOGY CORP) 128M X 64 DDR DRAM MODULE, 0.45 ns, DMA240 PDF资料下载
参数资料
| 型号： | NT1GT64U8HA0B-3C |
| 厂商： | NANYA TECHNOLOGY CORP |
| 元件分类： | DRAM |
| 英文描述： | 128M X 64 DDR DRAM MODULE, 0.45 ns, DMA240 |
| 封装： | DIMM-240 |
| 文件页数： | 16/20页 |
| 文件大小： | 311K |
| 代理商： | NT1GT64U8HA0B-3C |
NT512T64U88A0F / NT512T64U88A0B / NT512T64U88A0BY (Green)
NT1GT64U8HA0F / NT1GT64U8HA0B / NT1GT64U8HA0BY (Green)
512MB: 64M x 64 / 1GB: 128M x 64
Unbuffered DDR2 SDRAM DIMM
REV 1.1
5
03/2005
NANYA TECHNOLOGY CORP.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Input/Output Functional Description
Symbol
Type
Polarity
Function
CK0, CK1, CK2
(SSTL)
Positive
Edge
The positive line of the differential pair of system clock inputs which drives the input to
the on-DIMM PLL. All the DDR2 SDRAM address and control inputs are sampled on the
rising edge of their associated clocks.
CK0, CK1, CK2
(SSTL)
Negative
Edge
The negative line of the differential pair of system clock inputs which drives the input to
the on-DIMM PLL.
CKE0, CKE1
(SSTL)
Active
High
Activates the SDRAM CK signal when high and deactivates the CK signal when low. By
deactivating the clocks, CKE low initiates the Power Down mode, or the Self Refresh
mode.
CS0, CS1
(SSTL)
Active
Low
Enables the associated SDRAM command decoder when low and disables the
command decoder when high. When the command decoder is disabled, new commands
are ignored but previous operations continue.
RAS
, CAS, WE
(SSTL)
Active
Low
When sampled at the positive rising edge of the clock, RAS
, CAS, WE define the
operation to be executed by the SDRAM.
VREF
Supply
Reference voltage for SSTL-18 inputs
VDDQ
Supply
Isolated power supply for the DDR SDRAM output buffers to provide improved noise
immunity
ODT0, ODT1
Input
Active
High
On-Die Termination control signals
BA0, BA1
(SSTL)
-
Selects which SDRAM bank is to be active.
A0 – A9
A10/AP
A11 – A13
(SSTL)
-
During a Bank Activate command cycle, A0-A12 defines the row address (RA0-RA12)
when sampled at the rising clock edge.
During a Read or Write command cycle, A0-A9, A11 defines the column address
(CA0-CA10) when sampled at the rising clock edge. In addition to the column address,
AP is used to invoke Autoprecharge operation at the end of the Burst Read or Write
cycle. If AP is high, autoprecharge is selected and BA0/BA1 define the bank to be
precharged. If AP is low, autoprecharge is disabled.
During a Precharge command cycle, AP is used in conjunction with BA0/BA1 to control
which bank(s) to precharge. If AP is high all 4 banks will be precharged regardless of the
state of BA0/BA1. If AP is low, then BA0/BA1 are used to define which bank to
pre-charge.
DQ0 – DQ63
CB0 – CB7
(SSTL)
Active
High
Data and Check Bit Input/Output pins. Check bits are only applicable on the x72 DIMM
configurations.
VDD, VSS
Supply
Power and ground for the DDR SDRAM input buffers and core logic
DQS0 – DQS8
(SSTL)
Negative
and
Positive
Edge
Data strobe for input and output data
DM0 – DM8
Input
Active
High
The data write masks, associated with one data byte. In Write mode, DM operates as a
byte mask by allowing input data to be written if it is low but blocks the write operation if
it is high. In Read mode, DM lines have no effect. DM8 is associated with check bits
CB0-CB7, and is not used on x64 modules.
SA0 – SA2
-
Address inputs. Connected to either VDD or VSS on the system board to configure the
Serial Presence Detect EEPROM address.
SDA
-
This bi-directional pin is used to transfer data into or out of the SPD EEPROM. A resistor
must be connected from the SDA bus line to V DD to act as a pull-up.
SCL
-
This signal is used to clock data into and out of the SPD EEPROM. A resistor may be
connected from the SCL bus time to V DD to act as a pull-up.
VDDSPD
Supply
Serial EEPROM positive power supply.
相关PDF资料 |
PDF描述 |
|---|---|
| NT2GT72U4PD0BV-3C | 256M X 72 DDR DRAM MODULE, 0.45 ns, DMA240 |
| NT512T64U88B0BY-3C | 64M X 64 DDR DRAM MODULE, 0.5 ns, DMA240 |
| NT56V6620C0T-75 | SYNCHRONOUS DRAM, PDSO54 |
| NT5CB256M4AN-BF | DDR DRAM, PBGA78 |
| NT5DS64M8BF-6KI | DDR DRAM, PBGA60 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NT1R3000 | 功能描述:PCI Express / PCI 连接器 MM60 STAND OFF 3.9MM NUT RoHS:否 制造商:JAE Electronics 系列:MM60 产品类型:PCI Express 位置/触点数量:52 安装角:Right 安装风格:SMD/SMT 端接类型:Solder Pad 外壳材料:Plastic 触点材料:Copper Alloy 触点电镀:Gold |
| NT1S | 功能描述:烙铁 Weller Micro Tip For WMP Solder Penc RoHS:否 制造商:Weller 产品:Soldering Stations 类型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大温度:+ 850 F 电缆类型:US Cord Included |
| NT1S | 制造商:Cooper Hand Tools / Weller 功能描述:TIP STRAIGHT 0.25MM 制造商:WELLER 功能描述:TIP, STRAIGHT, 0.25MM 制造商:Cooper Hand Tools / Weller 功能描述:TIP, STRAIGHT, 0.25MM; Tip / Nozzle Width:0.25mm; Tip / Nozzle Style:Straight; For Use With:WMP Soldering Iron; Length:8.45mm; Operating Temperature Max:450C; Tip Length:8.5mm; Tip Size:0.25mm; Width:0.25mm ;RoHS Compliant: NA |
| NT1S001-XXX | 制造商:BOTHHAND 制造商全称:Bothhand USA, LP. 功能描述:SINGLE RJ45 CONNECTOR MODULE WITH INTEGRATED 10 BASE-T MAGNETICS & XLEDs |
| NT1S010-XXX | 制造商:BOTHHAND 制造商全称:Bothhand USA, LP. 功能描述:SINGLE RJ45 CONNECTOR MODULE WITH INTEGRATED 10 BASE-T MAGNETICS & XLEDs |
发布紧急采购，3分钟左右您将得到回复。