参数资料
型号: P83C880
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(带DDC接口,同步监测和同步处理的监视器微控制器)
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP42
封装: 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42
文件页数: 16/84页
文件大小: 420K
代理商: P83C880
1997 Dec 12
16
Philips Semiconductors
Product specification
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
P83Cx80; P87C380
7.3.6
PWM O
UTPUT
C
ONTROL
R
EGISTER
2 (PWME2)
Table 17
PWM Output Control Register 2 (SFR address E8H)
Table 18
Description of PWME2 bits
7.3.7
D
ATA
L
ATCHES FOR
8-
BIT
PWM
S
(PWM0
TO
PWM9)
Table 19
Data Latches for 8-bit PWMs (n = 0 to 9; SFR address C9H to CFH and EDH to EFH)
Table 20
Description of PWM0 to PWM9 bits
7
6
5
4
3
2
1
0
PATENA
DACE3
DACE2
DACE1
DACE0
PWME2.2
PWME2.1
PWME2.0
BIT
SYMBOL
DESCRIPTION
7
PATENA
PATOUT (pattern output) enable
. If PATENA = 1, the pin
PWM9/PATOUT/P3.1 is switched to the PATOUT (display test pattern)
output. If PATENA = 0, the PATOUT function is disabled. The PATOUT
function always overrides other alternative functions such as PWM9 and
P3.1.
DAC outputs enable (n = 3 to 0)
. If DACEn = 1, the corresponding
DACs: DAC3 to DAC0 are enabled. If DACEn = 0, the corresponding
DACs: DAC3 to DAC0 are disabled.
PWM outputs enable; n = 2 to 0
. If PWME2.n = 1, the corresponding
PWMs: PWM8, PWM9 and PWM10, are enabled by PWME2.2,
PWME2.1 and PWME2.0 respectively and pins PWM8/CLAMP/P3.0,
PWM9/PATOUT/P3.1 and PWM10/P1.7 are switched to PWM output. If
PWME2.n = 0, the corresponding PWM is disabled. Pins
PWM8/CLAMP/P3.0, PWM9/PATOUT/P3.1 and PWM10/P1.7 are
switched to I/O port functions P3.0, P3.1 and P1.7 respectively.
6 to 3
DACE3 to DACE0
2 to 0
PWME2.2 to PWME2.0
7
6
5
4
3
2
1
0
PWMn.7
PWMn.6
PWMn.5
PWMn.4
PWMn.3
PWMn.2
PWMn.1
PWMn.0
BIT
SYMBOL
DESCRIPTION
7 to 0
PWMn.7 to PWMn.0
8-bit data for PWM channel n (n = 0 to 9)
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