参数资料
型号: P83C880
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(带DDC接口,同步监测和同步处理的监视器微控制器)
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP42
封装: 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42
文件页数: 72/84页
文件大小: 420K
代理商: P83C880
1997 Dec 12
72
Philips Semiconductors
Product specification
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
P83Cx80; P87C380
Note
1.
This maximum applies at all times, including during power switching, and must be accounted for in power supply
design. During a power-on process, the +12 V source used for external pull-up resistors should not precede the V
DD
of the P83C880, P83C180, P83C280 and P83C380 up their respective voltage ramps by more than this margin, nor,
during a power-down process, should V
DD
precede +12 V down their respective voltage ramps by more than this
margin
.
26 DIGITAL-TO-ANALOG CONVERTER CHARACTERISTICS
V
DD
= 5 V; V
DDA
= 5 V; T
amb
= 27
°
C.
Note
1.
The ‘negative’ value denotes that the current is sourcing out from the chip into the load device through the output pin.
INT1/V
PP
V
IL
V
IH
V
IH
V
DD
input voltage with respect to V
DD
LOW-level input voltage
HIGH-level input voltage
V
SS
0.5
0.2V
DD
+ 0.9
0.2V
DD
0.1 V
12.6
8
I
IH
= 2 mA
V
V
SYMBOL
PARAMETER
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
V
DD
RES
DAC
I
o(DAC)
supply voltage
DAC resolution
operating current for each
DAC channel
DAC idle current
4.4
8
5.5
2.5
V
bit
mA
output pin connected to
V
DDA
via 40 k
all 4 DAC channels
shut-down
output pin open
at FFH code input;
I
OH
=
1mA (note 1)
at 00H code input;
I
OL
= 1mA
output level 0.2 to 4.8 V
I
o(DAC)(id)
61
μ
A
V
o(DAC)
DAC output level voltage
0
V
DDA
0.2
V
DDA
V
V
0.2
V
DL
e
t
st
V
o(T)
differential non-linearity
settling time
output voltage variation
due to temperature drift
output voltage ripple
1
+1
20
1.5
LSB
ms
mV/
°
C
V
o
T
test
> 20 ms
2
mV
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
相关PDF资料
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