参数资料
| 型号： | PCF8562TT/S400/2,1 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 20/43页 |
| 文件大小： | 0K |
| 描述： | IC LCD DRIVER 48-TSSOP |
| 标准包装： | 2,000 |
| 显示器类型： | LCD |
| 配置： | 7段 + DP，14段 + DP + AP，点阵 |
| 接口： | I²C，2 线串口 |
| 数字或字符： | 8 个字符，16 个字符 |
| 电流 - 电源： | 8µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | PCF8562TTS40021 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页当前第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页
NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
7.10.3 RAM writing in 1:3 multiplex drive mode
In 1:3 multiplex drive mode, the RAM is written as shown in Table 6 (see Figure 12 as
well).
Table 6. Standard RAM filling in 1:3 multiplex drive mode
Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are not connected to any elements on the display.
Display RAM
Display RAM addresses (columns)/segment outputs (Sn)
bits (rows)/
backplane
0
1
2
3
4
5
6
7
8
9
:
outputs (BPn)
0
1
2
3
a7
a6
a5
-
a4
a3
a2
-
a1
a0
-
-
b7
b6
b5
-
b4
b3
b2
-
b1
b0
-
-
c7
c6
c5
-
c4
c3
c2
-
c1
c0
-
-
d7
d6
d5
-
:
:
:
:
If the bit at position BP2/S2 would be written by a second byte transmitted, then the
Table 7. Entire RAM filling by rewriting in 1:3 multiplex drive mode
Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are connected to elements on the display.
Display RAM
Display RAM addresses (columns)/segment outputs (Sn)
bits (rows)/
backplane
0
1
2
3
4
5
6
7
8
9
:
outputs (BPn)
0
1
a7
a6
a4
a3
a1/b7 b4
a0/b6 b3
b1/c7 c4
b0/c6 c3
c1/d7 d4
c0/d6 d3
d1/e7 e4
d0/e6 e3
:
:
2
3
a5
-
a2
-
b5
-
b2
-
c5
-
c2
-
d5
-
d2
-
e5
-
e2
-
:
:
In the case described in Table 7 the RAM has to be written entirely and BP2/S2, BP2/S5,
BP2/S8 etc. have to be connected to elements on the display. This can be achieved by a
combination of writing and rewriting the RAM like follows:
? In the first write to the RAM, bits a7 to a0 are written.
? In the second write, bits b7 to b0 are written, overwriting bits a1 and a0 with bits b7
and b6.
? In the third write, bits c7 to c0 are written, overwriting bits b1 and b0 with bits c7 and
c6.
Depending on the method of writing to the RAM (standard or entire filling by rewriting),
some elements remain unused or can be used, but it has to be considered in the module
layout process as well as in the driver software design.
7.10.4 Output bank selector
The output bank selector (see Table 14 ) selects one of the four rows per display RAM
address for transfer to the display register. The actual row selected depends on the
particular LCD drive mode in operation and on the instant in the multiplex sequence.
? In 1:4 multiplex mode, all RAM addresses of row 0 are selected, these are followed by
the content of row 1, 2, and then 3
? In 1:3 multiplex mode, rows 0, 1, and 2 are selected sequentially
PCF8562
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 June 2011
? NXP B.V. 2011. All rights reserved.
20 of 43
相关PDF资料 |
PDF描述 |
|---|---|
| PCF8566P,112 | IC LCD DVR UNVRSL LOW-MUX 40-DIP |
| PCF8576T,118 | IC LCD DVR UNVRSL LOW-MUX 56VSO |
| PCF8578H/1,118 | IC LCD DRVR ROW/CLMN 64-LQFP |
| PCF8579H/1:118 | IC LCD COLUMN DRIVER 64-LQFP |
| PCN13-50S-2.54DSA | DIN CONN RCPT 50POS 2 ROW STR |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PCF8563 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563_11 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS/4 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS/4,118 | 功能描述:实时时钟 ULTRA LOW POWER RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。