参数资料
型号: PCF8562TT/S400/2,1
厂商: NXP Semiconductors
文件页数: 26/43页
文件大小: 0K
描述: IC LCD DRIVER 48-TSSOP
标准包装: 2,000
显示器类型: LCD
配置: 7段 + DP,14段 + DP + AP,点阵
接口: I²C,2 线串口
数字或字符: 8 个字符,16 个字符
电流 - 电源: 8µA
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-TFSOP(0.240",6.10mm 宽)
供应商设备封装: 48-TSSOP
包装: 带卷 (TR)
其它名称: PCF8562TTS40021
NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
mga807
Fig 15. System configuration
8.4 Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
? A slave receiver, which is addressed, must generate an acknowledge after the
reception of each byte.
? A master receiver must generate an acknowledge after the reception of each byte that
has been clocked out of the slave transmitter.
? The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
? A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Acknowledgement on the I 2 C-bus is illustrated in Figure 16 .
data output
by transmitter
not acknowledge
data output
by receiver
acknowledge
SCL from
master
1
2
8
9
S
START
condition
clock pulse for
acknowledgement
mbc602
Fig 16. Acknowledgement of the I 2 C-bus
PCF8562
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 June 2011
? NXP B.V. 2011. All rights reserved.
26 of 43
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