参数资料
| 型号： | PCF8562TT/S400/2,1 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 27/43页 |
| 文件大小： | 0K |
| 描述： | IC LCD DRIVER 48-TSSOP |
| 标准包装： | 2,000 |
| 显示器类型： | LCD |
| 配置： | 7段 + DP，14段 + DP + AP，点阵 |
| 接口： | I²C，2 线串口 |
| 数字或字符： | 8 个字符，16 个字符 |
| 电流 - 电源： | 8µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | PCF8562TTS40021 |
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NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
8.5 I 2 C-bus controller
The PCF8562 acts as an I 2 C-bus slave receiver. It does not initiate I 2 C-bus transfers or
transmit data to an I 2 C-bus master receiver. The only data output from the PCF8562 are
the acknowledge signals of the selected devices. Device selection depends on the
I 2 C-bus slave address, on the transferred command data and on the hardware
subaddress.
8.6 Input filters
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
8.7 I 2 C-bus protocol
Two I 2 C-bus slave addresses (0111 000 and 0111 001) are reserved for the PCF8562.
The least significant bit of the slave address that a PCF8562 will respond to is defined by
the level tied to its SA0 input. The PCF8562 is a write-only device and will not respond to
a read access.
The I 2 C-bus protocol is shown in Figure 17 . The sequence is initiated with a START
condition (S) from the I 2 C-bus master which is followed by one of two possible PCF8562
slave addresses available. All PCF8562s whose SA0 inputs correspond to bit 0 of the
slave address respond by asserting an acknowledge in parallel. This I 2 C-bus transfer is
ignored by all PCF8562s whose SA0 inputs are set to the alternative level.
R/W
slave address
S
acknowledge
acknowledge
S
0 1 1 1 0 0 A 0 A C
0
COMMAND
A
DISPLAY DATA
A
P
1 byte
n ≥ 1 byte(s)
n ≥ 0 byte(s)
update data pointers
001aac266
Fig 17. I 2 C-bus protocol
After an acknowledgement, one or more command bytes follow, that define the status of
each addressed PCF8562.
The last command byte sent is identified by resetting its most significant bit, continuation
bit C, (see Figure 18 ). The command bytes are also acknowledged by all addressed
PCF8562s on the bus.
MSB
C
REST OF OPCODE
LSB
msa833
Fig 18. Format of command byte
PCF8562
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 June 2011
? NXP B.V. 2011. All rights reserved.
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相关代理商/技术参数 |
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|---|---|
| PCF8563 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563_11 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
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| PCF8563BS/4,118 | 功能描述:实时时钟 ULTRA LOW POWER RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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