参数资料
| 型号： | PCF8562TT/S400/2,1 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 7/43页 |
| 文件大小： | 0K |
| 描述： | IC LCD DRIVER 48-TSSOP |
| 标准包装： | 2,000 |
| 显示器类型： | LCD |
| 配置： | 7段 + DP，14段 + DP + AP，点阵 |
| 接口： | I²C，2 线串口 |
| 数字或字符： | 8 个字符，16 个字符 |
| 电流 - 电源： | 8µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | PCF8562TTS40021 |
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NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
V DD
R ≤
t r
2C b
V DD
V LCD
HOST
MICRO-
PROCESSOR/
MICRO-
CONTROLLER
SDA 10
SCL
11
OSC
15
16
14
17
21
PCF8562
18
19
20
32 segment drives
4 backplanes
LCD PANEL
(up to 128
elements)
A0
A1
A2
SA0 V SS
001aac264
V SS
The resistance of the power lines must be kept to a minimum.
Fig 4.
Typical system configuration
The host microcontroller maintains the 2-line I 2 C-bus communication channel with the
PCF8562. The internal oscillator is enabled by connecting pin OSC to pin V SS . The
appropriate biasing voltages for the multiplexed LCD waveforms are generated internally.
The only other connections required to complete the system are to the power supplies
(V DD , V SS , and V LCD ) and the LCD panel chosen for the application.
7.1 Power-On Reset (POR)
At power-on the PCF8562 resets to the following starting conditions:
?
?
?
?
?
?
?
All backplane and segment outputs are set to V LCD
The selected drive mode is: 1:4 multiplex with 1 ? 3 bias
Blinking is switched off
Input and output bank selectors are reset
The I 2 C-bus interface is initialized
The data pointer and the subaddress counter are cleared (set to logic 0)
Display is disabled
Remark: Do not transfer data on the I 2 C-bus for at least 1 ms after a power-on to allow
the reset action to complete.
7.2 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider consisting of
three impedances connected in series between V LCD and V SS . The center impedance is
bypassed by switch if the 1 ? 2 bias voltage level for the 1:2 multiplex drive mode
configuration is selected. The LCD voltage can be temperature compensated externally,
using the supply to pin V LCD .
7.3 LCD voltage selector
The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the
selected LCD drive configuration. The operation of the voltage selector is controlled by the
mode-set command from the command decoder. The biasing configurations that apply to
the preferred modes of operation, together with the biasing characteristics as functions of
PCF8562
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 June 2011
? NXP B.V. 2011. All rights reserved.
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| PCF8563 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Real-time clock/calendar |
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