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参数资料
| 型号： | PCF8890 |
| 英文描述： | 240 + 1 outputs TFT LCD gate driver |
| 中文描述： | 240 1输出TFT液晶栅极驱动器 |
| 文件页数： | 30/76页 |
| 文件大小： | 385K |
| 代理商： | PCF8890 |
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2002 Aug 16
30
Philips Semiconductors
Preliminary specification
STN RGB - 384 output column driver
PCF8832
8.2
Set Y-address
Bits ys[7:0] and ye[7:0] define the Y-address range of the
display RAM for writing data. Values of ys and ye are
between 0 and 167 (A7H); ys must be smaller then ye.
Table 14
Y-address range
8.3
Set X-address
Bits xs and xe define the X-address range of the display
RAM for writing data. Values of xs, xe are between 0 and
127 (7FH); xs must be smaller then xe.
8.4
Programming V
COL
V
COL
can be programmed in the range V
COL(min)
= 2.5 V to
V
COL(max)
= 4.0 V. The following equation shows the
calculation of V
COL
Where
VPC is a 4-bit value that can be set via the command
register (see Table 10)
V
COL
= 100 mV.
Regardless of the equation, the value of V
COL
is limited to
the range 2.5 to 4.0 V.
8.5
Calculation of V
H
The following equation shows how to calculate V
H
.
R1 and R2 are external resistors (see Fig.62).
where
8.6
Programming of V
H(reg)
The voltage V
H(reg)
regulates the external row voltage
level V
H
withthecontroloftheexternalinductiveDC-to-DC
converter. If the external voltage V
FBQ
< V
H(reg)
, the
switching clock LCK will start to boost the row voltage
level. If V
FBQ
≥
V
H(reg),
the clock LCK stops to maintain the
row voltage level. The following equation shows the
calculation of V
H(reg)
V
H(reg) =
V
H(reg)(min) +
V
H(reg)
×
f
min
(VPR + TP)
×
VL
Where
V
T
isthesignedvaluedependentontemperaturesensor
output and programmed slope
VPR is an 8-bit value, set via the command register
V
H(reg)
= 7 mV (step size of V
H(reg)
)
V
H(reg)(min)
= 200 mV
VL is an 8-bit value, set via the command register
TP is a 5-bit signed value provided via the V
H(reg)
trimming inputs TP4, TP3, TP2, TP1 and TP0
f
min
is a minimum function, with VL it is possible to limit
the generated voltage (the low voltage limit is zero).
If VL < (VPR + TP), V
H(reg)
will be limited to the following
level
Table 15
V
H(reg)
trimming
y7
y6
y5
y
4
0
0
0
y3
y2
y1
y0
BANK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
1
2
to
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
1
166
167
V
COL
V
COL(min)
VPC
V
COL
×
+
=
V
H
V
H(reg)
K
RES
×
=
K
RES
R1
R2
+
R2
=
V
H(reg)
TRIMMING INPUTS
VALUE
TP4
TP3
TP2
TP1
TP0
1
1
0
0
0
0
0
0
0
1
16
15
to
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
0
+1
to
0
0
1
1
1
1
1
1
0
1
+14
+15
V
H(reg)
V
H(reg)(min)
V
H(reg)
VL
×
+
=
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