- 您现在的位置：买卖IC网 > PDF目录369949 > PCF8890 240 + 1 outputs TFT LCD gate driver PDF资料下载
参数资料
| 型号： | PCF8890 |
| 英文描述： | 240 + 1 outputs TFT LCD gate driver |
| 中文描述： | 240 1输出TFT液晶栅极驱动器 |
| 文件页数： | 41/76页 |
| 文件大小： | 385K |
| 代理商： | PCF8890 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页当前第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页
2002 Aug 16
41
Philips Semiconductors
Preliminary specification
STN RGB - 384 output column driver
PCF8832
11.2
Serial interface (3-line)
The serial interface is also a 3-line bidirectional interface
for communication between the microcontroller and the
LCD driver chip. The three lines are: SCE (chip enable),
SCLK (serial clock) and SDI/SDO (serial data).
11.2.1
W
RITE MODE
The interface write mode means that the microcontroller
writes commands and data to the PCF8832. Each data
packet contains a control bit D/C and a transmission byte.
If D/C is LOW, the byte that follows is interpreted as a
control byte.
The basic and the advanced protocols are supported. The
command set is given in Table 6. If D/C is HIGH, the byte
that follows is stored in the display data RAM. After every
data byte the address counter is incremented
automatically.
The serial interface is initialized when SCE is HIGH. In this
state, SCLK clock pulses have no effect and no power is
consumed by the serial interface. A falling edge on SCE
enables the serial interface and indicates the start of data
transmission.
Serial bus protocol (see Fig.41):
When SCE is HIGH, SCLK clocks are ignored. During
the HIGH time of SCE, the serial interface is initialized.
At the falling edge of SCE, SCLK must be LOW
SDI is sampled on the rising edge of SCLK
D/C indicates whether the byte is a command (D/C = 0)
or RAM data (D/C = 1); D/C is sampled with the first
rising edge of SCLK
If SCE stays LOW after the last bit of a command/data
byte, the serial interface expects the D/C bit of the next
byte at the next rising edge of SCLK
A reset pulse with RES interrupts the transmission (the
data being written into the RAM may be corrupted); the
registers are cleared, then if SCE is LOW after the rising
edge of RES, the serial interface is ready to receive the
D/C bit of a command/data byte.
handbook, full pagewidth
MGW713
transmission byte
D7
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
transmission byte
(1)
D/C
transmission byte
D/C
D/C
transmission byte
D/C
Fig.40 Serial data stream, write mode.
(1) Transmission byte may be a command byte or a data byte.
相关PDF资料 |
PDF描述 |
|---|---|
| PCF93C110 | 32-Bit Microcontroller |
| PCB93C110 | 32-Bit Microcontroller |
| PCG3N60C3W | TRANSISTOR | IGBT | N-CHAN | 600V V(BR)CES | CHIP |
| PCG4AX280MM | FUEHRUNGSSCHIENE LEITERPLATTE 280MM |
| PCH-1415FN | CLIP PIPE 15MM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| P-CF8GB-266W-DVDC | 制造商:PNY Technologies 功能描述:OPTIMA PRO UDMA 8GB CF CARD - Bulk |
| P-CF8GB-266X-DVDC | 制造商:PNY Technologies 功能描述:OPTIMA PRO UDMA 8GB CF CARD - Bulk |
| PCF-A-03 | 制造商:Adam Technologies Inc 功能描述:03 Positions RECEPTACLE WITH BOARD HOOKS Top entry |
| PCFA-1GC02A-301N | 制造商:SMART Modular Technology Inc 功能描述:FLASH CARD WITH CONNECTOR - Trays |
| PCFA-1GC03AN-301 | 制造商:SMART Modular Technology Inc 功能描述:FLASH CARD WITH CONNECTOR - Trays |
发布紧急采购，3分钟左右您将得到回复。