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| 型号： | PCF8890 |
| 英文描述： | 240 + 1 outputs TFT LCD gate driver |
| 中文描述： | 240 1输出TFT液晶栅极驱动器 |
| 文件页数： | 38/76页 |
| 文件大小： | 385K |
| 代理商： | PCF8890 |
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2002 Aug 16
38
Philips Semiconductors
Preliminary specification
STN RGB - 384 output column driver
PCF8832
11 SERIAL INTERFACES
Communication with the microcontroller can also occur via
a clock-synchronized serial peripheral interface. It is
possible to select two different 3-line interfaces (SPI
and
serial interface) or a 4-line SPI.
11.1
Serial peripheral interface
The SPI is a 3-line or 4-line interface for communication
between the microcontroller and the LCD driver chip. The
three linesare:SCE(chipenable),SCLK(serialclock)and
SDI (serial data). For the 4-line serial interface a separate
D/C line is included.
The PCF8832 is connected to the serial data I/O of the
microcontroller by two pins: SDI (data input) and SDO
(data output) which must be connected together.
11.1.1
W
RITE MODE
The display data/command indication may be controlled
either via software (3-line SPI) or the D/C select pin
(4-line SPI). When the D/C pin is used, display data is
transmitted when D/C is HIGH and command data is
transmitted when D/C is LOW (see Figs 35 and 36). When
D/C is not used, then the D/C is set via the control byte.
When the 3-line SPI interface is used, the display
data/command is controlled by software (see
Figs 37 and 38).
If SCE is pulled HIGH during a serial display data stream,
the interrupted byte is invalid data but all previously
transmitted data are valid.
handbook, full pagewidth
SCE
SCLK
SDI
MGW708
b6
b7
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
D/C
S
P
register value
control byte
Fig.35 Serial bus protocol, write to register.
handbook, full pagewidth
SCE
SCLK
SDI
MGW709
b6
b7
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
D/C
S
P
display data
control byte
Fig.36 Serial bus protocol, write to RAM.
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