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参数资料
| 型号： | PIC18F252-E/SO |
| 厂商： | Microchip Technology |
| 文件页数： | 54/134页 |
| 文件大小： | 0K |
| 描述： | IC MCU CMOS 40MHZ 16K FLSH28SOIC |
| 产品培训模块： | Asynchronous Stimulus |
| 标准包装： | 27 |
| 系列： | PIC® 18F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 40MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，LVD，POR，PWM，WDT |
| 输入/输出数： | 23 |
| 程序存储器容量： | 32KB（16K x 16） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 256 x 8 |
| RAM 容量： | 1.5K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 数据转换器： | A/D 5x10b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 包装： | 管件 |
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Micrel, Inc.
KSZ8864RMN
April 2012
26
M9999-043012-1.5
Forwarding
The KSZ8864RMN will forward packets using an algorithm that is depicted in the following flowcharts. Figure 6 shows
stage one of the forwarding algorithm where the search engine looks up the VLAN ID, static table, and dynamic table for
the destination address, and comes up with “port to forward 1” (PTF1). PTF1 is then further modified by the spanning tree,
IGMP snooping, port mirroring, and port VLAN processes to come up with “port to forward 2” (PTF2), as shown in Figure
7. This is where the packet will be sent.
KSZ8864RMN will not forward the Following Packets:
Error packets. These include framing errors, FCS errors, alignment errors, and illegal size packet errors.
802.3x pause frames. The KSZ8864RMN will intercept these packets and perform the appropriate actions.
“Local” packets. Based on destination address (DA) look-up. If the destination port from the look-up table matches the
port where the packet was from, the packet is defined as “local.”
Switching Engine
The KSZ8864RMN features a high-performance switching engine to move data to and from the MAC’s, packet buffers. It
operates in store and forward mode, while the efficient switching mechanism reduces overall latency. The KSZ8864RMN
has a 64kB internal frame buffer. This resource is shared between all five ports. There are a total of 512 buffers available.
Each buffer is sized at 128B.
Media Access Controller (MAC) Operation
The KSZ8864RMN strictly abides by IEEE 802.3 standards to maximize compatibility.
Inter-Packet Gap (IPG)
If a frame is successfully transmitted, the 96-bit time IPG is measured between the two consecutive MTXEN. If the current
packet is experiencing collision, the 96-bit time IPG is measured from MCRS and the next MTXEN.
Backoff Algorithm
The KSZ8864RMN implements the IEEE Std. 802.3 binary exponential back-off algorithm, and optional “aggressive
mode” back off. After 16 collisions, the packet will be optionally dropped depending on the chip configuration in Register 3.
See “Register 3.”
Late Collision
If a transmit packet experiences collisions after 512-bit times of the transmission, the packet will be dropped.
Illegal Frames
The KSZ8864RMN discards frames less than 64 bytes and can be programmed to accept frames up to 1536 bytes in
Register 4. For special applications, the KSZ8864RMN can also be programmed to accept frames up to 1916 bytes in
Register 4. Since the KSZ8864RMN supports VLAN tags, the maximum sizing is adjusted when these tags are present.
Flow Control
The KSZ8864RMN supports standard 802.3x flow control frames on both transmit and receive sides.
On the receive side, if the KSZ8864RMN receives a pause control frame, the KSZ8864RMN will not transmit the next
normal frame until the timer, specified in the pause control frame, expires. If another pause frame is received before the
current timer expires, the timer will be updated with the new value in the second pause frame. During this period (being
flow controlled), only flow control packets from the KSZ8864RMN will be transmitted.
On the transmit side, the KSZ8864RMN has intelligent and efficient ways to determine when to invoke flow control. The
flow control is based on availability of the system resources, including available buffers, available transmit queues and
available receive queues.
The KSZ8864RMN flow controls a port that has just received a packet if the destination port resource is busy. The
KSZ8864RMN issues a flow control frame (XOFF), containing the maximum pause time defined in IEEE standard 802.3x.
Once the resource is freed up, the KSZ8864RMN sends out the other flow control frame (XON) with zero pause time to
turn off the flow control (turn on transmission to the port). A hysteresis feature is also provided to prevent over-activation
and deactivation of the flow control mechanism.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PIC18F252-I/SO | 功能描述:8位微控制器 -MCU 32KB 1536 RAM 23 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC18F252-I/SO | 制造商:Microchip Technology Inc 功能描述:8BIT FLASH MCU SMD 18F252 SOIC28 |
| PIC18F252-I/SOG | 功能描述:8位微控制器 -MCU 32KB 1536 RAM 23I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC18F252-I/SP | 功能描述:8位微控制器 -MCU 32KB 1536 RAM 23I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC18F252-I/SP | 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU 18F252 SDIL28 |
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