4: PINS
1-12
EPSON
S1D13806 SERIES HARDWARE FUNCTIONAL
SPECIFICATION (X28B-A-001-03)
BS#
I
30
CS
Hi-Z
This is a multi-purpose pin:
For SH-3/SH-4 Bus, this pin inputs the bus start signal (BS#).
For MC68K Bus 1, this pin inputs the address strobe (AS#).
For MC68K Bus 2, this pin inputs the address strobe (AS#).
For Generic Bus, this pin is connected to VDD.
For MIPS/ISA Bus, this pin is connected to VDD.
For Philips PR31500/31700 Bus, this pin is connected to VDD.
For Toshiba TX39xx Bus, this pin is connected to VDD.
For PowerPC Bus, this pin inputs the Transfer Start signal (TS#).
For PC Card (PCMCIA) Bus, this pin is connected to VDD.
See the respective AC Timing diagram for detailed functionality.
RD/WR#
I
34
CS
Hi-Z
This is a multi-purpose pin:
For SH-3/SH-4 Bus, this pin inputs the read write signal (RD/WR#). The
S1D13806 needs this signal for early decode of the bus cycle.
For MC68K Bus 1, this pin inputs the read write signal (R/W#).
For MC68K Bus 2, this pin inputs the read write signal (R/W#).
For Generic Bus, this pin inputs the read command for the upper data byte (RD1#).
For MIPS/ISA Bus, this pin is connected to VDD.
For Philips PR31500/31700 Bus, this pin inputs the even byte access enable signal
(/CARDxCSL).
For Toshiba TX39xx Bus, this pin inputs the even byte access enable signal
(CARDxCSL*).
For PowerPC Bus, this pin inputs the read write signal (RD/WR#).
For PC Card (PCMCIA) Bus, this pin inputs the card enable 1 signal (-CE1).
See the respective AC Timing diagram for detailed functionality.
RD#
I
31
CS
Hi-Z
This is a multi-purpose pin:
For SH-3/SH-4 Bus, this pin inputs the read signal (RD#).
For MC68K Bus 1, this pin is connected to VDD.
For MC68K Bus 2, this pin inputs the bus size bit 1 (SIZ1).
For Generic Bus, this pin inputs the read command for the lower data byte (RD0#).
For MIPS/ISA Bus, this pin inputs the memory read signal (MEMR#).
For Philips PR31500/31700 Bus, this pin inputs the memory read command (/RD).
For Toshiba TX39xx Bus, this pin inputs the memory read command (RD*).
For PowerPC Bus, this pin inputs the transfer size 0 signal (TSIZ0).
For PC Card (PCMCIA) Bus, this pin inputs the output enable signal (-OE).
See the respective AC Timing diagram for detailed functionality.
Table 4-1 Host Interface Pin Descriptions (Continued)
Pin Name Type
Pin #
Cell
RESET#
State
Description