参数资料
型号: SDED7-256M-N9Y
厂商: SANDISK CORP
元件分类: 存储控制器/管理单元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA115
封装: 12 X 9 MM, 1.20 MM HEIGHT, FBGA-115
文件页数: 37/87页
文件大小: 1675K
代理商: SDED7-256M-N9Y
Rev. 1.2
mDOC H3 Registers
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
42
92-DS-1205-10
7.3.3
Paged RAM Unique ID Download Register
Description:
Writing to this 8 bit register initiates a download of the 16-byte Unique
Identification (UID) number to offset 0 of the downloadable section of the IPL
RAM. After polling for ready status, the requested data may be read from the
IPL RAM.
Writes to this register will be ignored if the prior bus cycle was not a write cycle
to the Paged RAM Command Register with data 71H (intervening RAM read
cycles are allowed).
Address (hex): 0080 (both 8KB window and 128KB Window)
Type:
Write
D7-D0
Read/Write
W
Bit Name
RFU_0
Reset Value
N/A
7.3.4
Chip Identification (ID) Register [0:1]
Description:
These two 16-bit registers are used to identify the mDOC device residing on the
host platform. They always return the same value.
Chip Identification Register [1] holds the bit inverse of Chip Identification
Register [0].
Address (hex): 128KB window: 9400 / 9422
8KB window 1400 / 1422
Type:
Read only
D15-D0
Read/Write
R
Bit Name
ChipID / ChipID inverse
Reset Value
Chip Identification Register[0]: 4833H
Chip Identification Register[1] – bit inverse: B7CCH
7.3.5
Burst Mode Control Registers (Read & Write)
Description:
These 16 bit registers contain the parameters for the burst transactions.
There is one register for burst write and one for burst read. The structure of both
registers is the same.
Address (hex): 128KB window: 9424 (Burst Read) / 9402 (Burst Write)
8KB window: 1424 (Burst Read) / 1402 (Burst Write)
Type:
Read / Write
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