参数资料
型号: SFPA8192Q1BO2TO-I-QT-223-STD
厂商: Swissbit NA Inc
文件页数: 59/76页
文件大小: 0K
描述: FLASH SSD SMART UDMA 2.5" 8GB
视频文件: Swissbit Manufacturing Overview
RoHS指令信息: Environment Protection Declaration
标准包装: 4
系列: P-120
存储容量: 8GB
存储器类型: FLASH
其它名称: 1052-1025
8.35 Wear Level (F5h)
This command is effectively a NOP command and only implemented for backward compatibility. The Sector
Count Register will always be retur ned with a ‘00h’ indicating Wear Level is not needed.
defines the Wear Level command Byte sequence.
Table 78: Wear level
Task File Register
7
6
5
4
3
2
1
0
COMMAND
F5h
DRIVE/HEAD
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
nu
D
nu
nu
nu
Completion Status
nu
nu
8.36 Write Buffer (E8h)
The Write Buffer command enables the host to overwrite contents of the Drive ’s sector buffer with any data
pattern desired. This command has the same protocol as the Write Sector(s) command and transfers 512
Bytes.
Table 79 defines the Write Buffer command Byte sequence.
Table 79: Write Buffer
Task File Register
7
6
5
4
3
2
1
0
COMMAND
E8h
DRIVE/HEAD
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
nu
D
nu
nu
nu
nu
nu
nu
8.37 Write DMA (CAh)
This command uses DMA mode to write from 1 to 256 sectors as specified in the Sector Count register. A
sector count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number
Register. When this command is issued the Drive sets BSY, puts all or part of the sector of data in the buffer.
The Drive is then permitted, although not required, to set DRQ, clear BSY. The Drive asserts DMAREQ while
data is available to be transferred. The host then writes the (512 * sector-count) bytes of data to the Drive
using DMA. While DMAREQ is asserted by the Drive, the Host asserts -DMACK while it is ready to transfer data
by DMA and asserts -IOWR once for each 16 bit word to be transferred from the Host.
Interrupts are not generated on every sector, but upon completion of the transfer of the entire number of
sectors to be transferred or upon the occurrence of an unrecoverable error. At command completion, the
Command Block Registers contain the cylinder, head and sector number of the last sector written. If an
error occurs, the write terminates at the sector where the error occurred. The Command Block Registers
contain the cylinder, head, and sector number of the sector where the error occurred. The amount of data
transferred is indeterminate.
When a Write DMA command is received by the Drive and 8 bit transfer mode has been enabled
by the Set Features command, the Drive shall return the Aborted error.
Table 80: Write DMA
Task File Register
7
6
5
4
3
2
1
0
COMMAND
CAh
DRIVE/HEAD
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
LBA
D
Cylinder High (LBA23-16)
Cylinder Low (LBA15-8)
Sector number (LBA7-0)
Sector Count
nu
Head (LBA 27-24)
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
P-120_data_sheet_PA-QxBO_Rev100.doc
Page 59 of 76
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