参数资料
型号: SFPA8192Q1BO2TO-I-QT-223-STD
厂商: Swissbit NA Inc
文件页数: 60/76页
文件大小: 0K
描述: FLASH SSD SMART UDMA 2.5" 8GB
视频文件: Swissbit Manufacturing Overview
RoHS指令信息: Environment Protection Declaration
标准包装: 4
系列: P-120
存储容量: 8GB
存储器类型: FLASH
其它名称: 1052-1025
8.38 Write Multiple Command (C5h)
This command is similar to the Write Sectors command. The Drive sets BSY within 400ns of accepting the
command. Interrupts are not presented on each sector but on the transfer of a block which contains the
number of sectors defined by Set Multiple. Command execution is identical to the Write Sectors operation
except that the number of sectors defined by the Set Multiple command is transferred without intervening
interrupts.
DRQ qualification of the transfer is required only at the start of the data block, not on each sector. The block
count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode
command, which must be executed prior to the Write Multiple command.
When the Write Multiple command is issued, the Sector Count Register contains the number of sectors (not
the number of blocks or the block count) requested. If the number of requested sectors is not evenly
divisible by the sector/block, as many full blocks as possible are transferred, followed by a final, partial
block transfer. The partial block transfer is for n sectors, where:
n = (sector count) module (block count).
If the Write Multiple command is attempted before the Set Multiple Mode command has been executed or
when Write Multiple commands are disabled, the Write Multiple operation will be rejected with an aborted
command error.
Errors encountered during Write Multiple commands are posted after the attempted writes of the block or
partial block transferred. The Write command ends with the sector in error, even if it is in the middle of a
block. Subsequent blocks are not transferred in the event of an error. Interrupts are generated when DRQ is
set at the beginning of each block or partial block.
The Command Block Registers contain the cylinder, head and sector number of the sector where the error
occurred and the Sector Count Register contains the residual number of sectors that need to be transferred
for successful completion of the command. For example, each block has 4 sectors, a request for 8 sectors is
issued and an error occurs on the third sector. The Sector Count Register contains 6 and the address is that
of the third sector.
Note: The current revision of the Drive only supports a block count of 1 as indicated in the Identify Drive
Command information. The Write Multiple command is provided for compatibility with future products
which may support a larger block count.
Table 81 defines the Write Multiple command Byte sequence.
Table 81: Write Multiple
Task File Register
7
6
5
4
3
2
1
0
COMMAND
C5h
DRIVE/HEAD
1
LBA
1
D
Head (LBA 27-24)
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
Cylinder High (LBA23-16)
Cylinder Low (LBA15-8)
Sector number (LBA7-0)
Sector Count
nu
8.39 Write Multiple without Erase (CDh)
This command is similar to the Write Multiple command with the exception that an implied erase before
write operation is not performed. The sectors should be pre-erased with the Erase Sector(s) command
before this command is issued. Table 82 defines the Write Multiple without Erase command Byte sequence.
Table 82: Write Multiple without Erase
Task File Register
7
6
5
4
3
2
1
0
COMMAND
CDh
DRIVE/HEAD
1
LBA
1
D
Head (LBA 27-24)
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
Cylinder High (LBA23-16)
Cylinder Low (LBA15-8)
Sector number (LBA7-0)
Sector Count
nu
8.40 Write Sector(s) (30h or 31h)
This command writes from 1 to 256 sectors as specified in the Sector Count Register. A sector count of zero
requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this
command is accepted, the Drive sets BSY, sets DRQ and clears BSY, then waits for the host to fill the sector
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
P-120_data_sheet_PA-QxBO_Rev100.doc
Page 60 of 76
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