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参数资料
| 型号： | SFPA8192Q1BO2TO-I-QT-223-STD |
| 厂商： | Swissbit NA Inc |
| 文件页数： | 9/76页 |
| 文件大小： | 0K |
| 描述： | FLASH SSD SMART UDMA 2.5" 8GB |
| 视频文件： | Swissbit Manufacturing Overview |
| RoHS指令信息： | Environment Protection Declaration |
| 标准包装： | 4 |
| 系列： | P-120 |
| 存储容量： | 8GB |
| 存储器类型： | FLASH |
| 其它名称： | 1052-1025 |
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5 Electrical interface
5.1 Electrical description
The SSD is connected with a standard IDE 44 pin connector (pitch 2.00mm). The power is connected at pin
41-44. The Master card can be configured as Master or slave with a jumper at pins A – D.
The signal/pin assignments and descriptions are listed in Table 11 Low active signals have a ‘ - ’ prefix.
Pin types are Input, Output or Input/Output. Inputs are signals sourced from the host while Outputs are
signals sourced from the Drive.
The configuration of the SSD is controlled using the standard IDE configuration registers starting at address
200h in the Attribute Memory space of the memory drive.
Table 11: Pin Assignment, Type, and description
Signal description
Pin
Type
Signal
Name
Pin Num
Signal
Name
Pin
Type
Signal description
Reset signal from host. Reset is
active on power
I
-RESET
1
2
GND
Ground
up and inactive thereafter.
I/O
D07
3
4
D08
I/O
Pins 3 through 18 (16 lines (15-
0) carry the data between the
controller and the host. The
low 8 lines transfer commands
and the ECC information
between the host and the
controller.
I/O
I/O
I/O
I/O
I/O
I/O
D06
D05
D04
D03
D02
D01
5
7
9
11
13
15
6
8
10
12
14
16
D09
D10
D11
D12
D13
D14
I/O
I/O
I/O
I/O
I/O
I/O
Pins 3 through 18 (16 lines (15-0)
carry the data between the
controller and the host. The low 8
lines transfer commands and the
ECC information between the host
and the controller.
Ground
I/O
D00
GND
17
19
18
20
D15
Key
I/O
Connector key
Not used.
O
DMARQ
21
22
GND
Ground
This I/O Write strobe pulse is
used to clock I/O data or
commands on the drive data
bus into the drive controller
registers when the drive is
configured to use the I/O
I
-IOWR/
STOP
23
24
GND
Ground
interface. The clocking will
occur on the negative to
positive edge of the signal
(trailing edge).
This is a Read strobe generated
by the host. The signal gates
I/O data or status on the host
bus and strobes the data from
the controller into the host on
the low to high transition
I
-IORD
HSTROBE
-
HDMARDY
25
26
GND
Ground
(trailing edge).
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
P-120_data_sheet_PA-QxBO_Rev100.doc
Page 9 of 76
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