参数资料
型号: SI3015-F-FS
厂商: Silicon Laboratories Inc
文件页数: 37/94页
文件大小: 0K
描述: IC ISOMODEM LINE-SIDE DAA 16SOIC
标准包装: 48
系列: ISOmodem®
数据格式: V.90
波特率: 2.4k
电源电压: 3.3V,5V
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC N
包装: 管件
Si2400
42
Rev. 1.3
7.2. Call Progress Filters
The programmable call progress filter coefficients are
located in DSP address locations 0x0010 through
0x0023. There are two independent 4th order filters A
and B, each consisting of two biquads, for a total of 20
coefficients. Coefficients are 14 bits (–8192 to 8191)
and are interpreted as, for example, b0 = value/4096,
thus giving a floating point value of approximately –2.0
to 2.0. Output of each biquad is calculated as
w[n] = k0 x[n] + a1 w[n – 1] + a2 w[n – 2]
y[n] = w[n] + b1 w[n – 1] + b2 w[n – 2].
The output of the filters is input to an energy detector
and then compared to a fixed threshold with hysteresis
(DSP register CPDL). Defaults shown are a bandpass
filter from 290–630 Hz (–3 dB). These registers are
located in the DSP and thus must be written in the same
manner described in “DSP Registers”.
The filters may be configured in either parallel or
cascade through SE6[6] (CPCD) with SE8 = 0x02, and
the output of filter B may be squared by selecting
SE6[7] (CPSQ) = 1b. Figure 13 shows a block diagram
of the call progress filter structure.
Figure 13. Programmable Call Progress Filter Architecture
Table 26. Call Progress Filters
DSP Register
Address
Coefficient
Default (dec)
0x0010
A1_k0
256
0x0011
A1_b1
–8184
0x0012
A1_b2
4096
0x0013
A1_a1
7737
0x0014
A1_a2
–3801
0x0015
A2_k0
1236
0x0016
A2_b1
133
0x0017
A2_b2
4096
0x0018
A2_a1
7109
0x0019
A2_a2
–3565
0x001A
B1_k0
256
0x001B
B1_b1
–8184
0x001C
B1_b2
4096
0x001D
B1_a1
7737
0x001E
B1_a2
–3801
0x001F
B2_k0
1236
0x0020
B2_b1
133
0x0021
B2_b2
4096
0x0022
B2_a1
7109
0x0023
B2_a2
–3565
Filter B
Energy
Detect
1
0
1
0
Filter A
Filter Input
y = x
2
CPSQ
Energy
Detect
0
CPCD
Max
(A,B)
Hysteresis
A > B?
20log 10 (4096/CPDL) –34 dBm
TDET
A
B
A
B
CPCD
0
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