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| 型号： | SI5320-H-BL |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 13/34页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK MULT SONET/SDH 63-PBGA |
| 标准包装： | 260 |
| 系列： | DSPLL® |
| 类型： | 时钟乘法器 |
| PLL： | 是 |
| 输入： | LVTTL |
| 输出： | CML |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 693MHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 63-LBGA |
| 供应商设备封装： | 63-PBGA（9x9） |
| 包装： | 托盘 |
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Si5320
20
Rev. 2.5
2.9. Bias Generation Circuitry
The Si5320 makes use of an external resistor to set
internal bias currents. The external resistor allows
precise generation of bias currents which significantly
reduces power consumption and variation as compared
with traditional implementations that use an internal
resistor. The bias generation circuitry requires a 10 k
Ω
(1%) resistor connected between REXT and GND.
2.10. Differential Input Circuitry
The Si5320 provides a differential input for the clock
input, CLKIN. This input is internally biased to a voltage
differential or single-ended driver circuit. For differential
transmission lines, the termination resistor is connected
externally as shown.
2.11. Differential Output Circuitry
The Si5320 utilizes a current mode logic (CML)
architecture to drive the differential clock output,
CLKOUT.
For single-ended output operation, simply connect to
either CLKOUT+ or CLKOUT–, and leave the unused
signal unconnected.
2.12. Power Supply Connections
The Si5320 incorporates an on-chip voltage regulator.
The
voltage
regulator
requires
an
external
compensation circuit of one resistor and one capacitor
to ensure stability over all operating conditions.
Internally, the Si5320 VDD33 pins are connected to the
on-chip voltage regulator input, and the VDD33 pins also
supply power to the device’s LVTTL I/O circuitry. The
VDD25 pins supply power to the core DSPLL circuitry
and are also used for connection of the external
compensation circuit.
The regulator’s compensation circuit is in reality a
resistor and a capacitor in series between the VDD25
node and ground. (See Figure 5 on page 15.) Typically,
the resistor is incorporated into the capacitor’s
equivalent series resistance (ESR). The target RC time
constant for this combination is 15 to 50
μs. The
capacitor used in the Si5320 evaluation board is a
33
μF tantalum capacitor with an ESR of 0.8 Ω. This
gives an RC time constant of 26.4
μs. The Venkel part
number, TA6R3TCR336KBR, is an example of a
capacitor that meets these specs.
To get optimal performance from the Si5320 device, the
power supply noise spectrum must comply with the plot
in Figure 10. This plot shows the power supply noise
tolerance mask for the Si5320. The customer should
provide a 3.3 V supply that does not have noise density
in excess of the amount shown in the diagram.
However, the diagram cannot be used as spur criteria
for a power supply that contains single tone noise.
Figure 10. Power Supply Noise Tolerance Mask
f
Vn (μV/√Hz)
2100
42
10 kHz
500 kHz
100 Mhz
相关PDF资料 |
PDF描述 |
|---|---|
| SI5320-H-GL | IC CLOCK MULT SONET/SDH 63LFBGA |
| SI5321-G-BC | IC PREC CLOCK MULTIPLIER 63CBGA |
| SI5321-H-BL | IC CLOCK MULT SONET/SDH 63-PBGA |
| SI5322-B-GM | IC PREC CLOCK MULTIPLIER 36QFN |
| SI5323-B-GM | IC MULTIPLIER/ATTENUATOR 36QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| Si5320-H-GL | 功能描述:时钟发生器及支持产品 SONET/SDH Precisn Clock Multiplr RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| SI5320-X-BC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SONET/SDH PRECISION CLOCK MULTIPLIER IC |
| SI5321 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SONET/SDH PRECISION CLOCK MULTIPLIER IC |
| SI5321-EVB | 功能描述:时钟和定时器开发工具 G.709FEC & 66/64Sc 19-2.5GHz Output RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
| SI5321-F-BC | 功能描述:时钟合成器/抖动清除器 FOR NEW DESIGNS RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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