参数资料
型号: SI5338-EVB
厂商: Silicon Laboratories Inc
文件页数: 43/44页
文件大小: 0K
描述: BOARD EVALUATION SI5338
标准包装: 1
主要目的: 计时,时钟发生器
嵌入式:
已用 IC / 零件: Si5338
主要属性: LVPECL/LVDS:160 kHz 至 700 MHz,<1 ps RMS 标准抖动,零 ppm 频率错误
次要属性: 基于 USB 的 GUI,用于编程,I2C/SMBus 兼容接口,1.8、2.5 或 3.3 V
已供物品: 板,线缆,CD,样品
产品目录页面: 628 (CN2011-ZH PDF)
相关产品: 336-1555-5-ND - IC CLK GEN QUAD 200MHZ 24-QFN
336-1554-5-ND - IC CLK GEN QUAD 350MHZ 24-QFN
336-1553-5-ND - IC CLK GEN QUAD 700MHZ 24-QFN
其它名称: 336-1556
Si5338
8
Rev. 1.3
Table 6. Input and Output Clock Characteristics
(VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Input Clock (AC Coupled Differential Input Clocks on Pins IN1/2, IN5/6)1
Frequency
fIN
5—
710
MHz
Differential Voltage
Swing
VPP
710 MHz input
0.4
2.4
VPP
Rise/Fall Time2
tR/tF
20%–80%
1.0
ns
Duty Cycle
DC
< 1 ns tr/tf
40
60
%
Duty Cycle
DC
(PLL bypass)3
< 1 ns tr/tf
45
55
%
Input Impedance1
RIN
10
k
Input Capacitance
CIN
—3.5
pF
Input Clock (DC-Coupled Single-Ended Input Clock on Pins IN3/4)
Frequency
fIN
CMOS
5
200
MHz
Input Voltage
VI
–0.1
3.73
V
Input Voltage Swing
200 MHz
0.8
VDD+10%
Vpp
Rise/Fall Time4
tR/tF
10%–90%
4
ns
Rise/Fall Time4
tR/tF
20%–80%
2.3
ns
Duty Cycle5
DC
< 4 ns tr/tf
40
60
%
Input Capacitance
CIN
—2.0
pF
Output Clocks (Differential)
Frequency6
fOUT
LVPECL, LVDS,
CML
0.16
350
MHz
367
473.33
MHz
550
710
MHz
HCSL
0.16
250
MHz
Notes:
1. Use an external 100
resistor to provide load termination for a differential clock. See Figure 3.
2. For best jitter performance, keep the midpoint differential input slew rate on pins 1,2,5,6 faster than 0.3 V/ns.
3. Minimum input frequency in clock buffer mode (PLL bypass) is 5 MHz. Operation to 1 MHz is also supported in buffer
mode, but loss-of-signal (LOS) status is not functional.
4. For best jitter performance, keep the mid point input single ended slew rate on pins 3 or 4 faster than 1 V/ns.
5. Not in PLL bypass mode.
6. Only two unique frequencies above 350 MHz can be simultaneously output, Fvco/4 and Fvco/6. See "3.3. Synthesis
7. CML output format requires ac-coupling of the differential outputs to a differential 100
load at the receiver.
8. Includes effect of internal series 22
resistor.
相关PDF资料
PDF描述
H3AAH-2606G IDC CABLE - HSC26H/AE26G/HSC26H
0982660138 CBL 12POS 0.5MM JMPR TYPE D 1'
0982661084 CBL 37POS 0.5MM JMPR TYPE D 6"
HMC08DRTH CONN EDGECARD 16POS DIP .100 SLD
EBC43DCSD-S288 CONN EDGECARD 86POS .100 EXTEND
相关代理商/技术参数
参数描述
SI5338F-A01839-GM 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Bulk
SI5338F-A01839-GMR 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel
Si5338F-A-GM 功能描述:时钟发生器及支持产品 I2C-PRGRMBL clock generatr 0.16-200MHz RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
SI5338F-A-GMR 功能描述:时钟发生器及支持产品 I2C-Program Clk Gen 0.16-200MHz Pin-Ctrl RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
Si5338F-B-GM 功能描述:时钟发生器及支持产品 I2C-PRGRMBL clock generatr 0.16-200MHz RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56