参数资料
型号: SI9912DY-T1-E3
厂商: Vishay Siliconix
文件页数: 7/9页
文件大小: 0K
描述: IC DRIVER GATE HALF BRIDGE 8SOIC
标准包装: 2,500
配置: 半桥
输入类型: 非反相
延迟时间: 25ns
电流 - 峰: 1A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 30V
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
Si9912
Vishay Siliconix
Bootstrap Supply Operation
(see Functional Block Diagram)
The power to drive the high-side MOSFET (Q2) gate comes
from the bootstrap capacitor (C BOOT ). This capacitor charges
through D1 during the time when the low-side MOSFET is on
(V S is at GND potential), and then provides the necessary
charge to turn on the high-side MOSFET . C BOOT should be
sized to be greater than ten times the high-side MOSFET gate
capacitance, and large enough to supply the bootstrap current
(I BOOT ) during the high-side on time, without significant voltage
droop.
Shutdown (SD)
(shutdown input, active low)
When this pin is high, the IC operates normally. When this pin
is low, both high- and low-side MOSFETs are turned off .
Layout Considerations
There are a few critical layout considerations for these parts.
Firstly, the IC must be decoupled as closely as possible to the
power pins. Secondly the IC should be placed physically close
to the high- and low-side MOSFETs it is driving. The major
consideration is that the MOSFET gates must be charged or
discharged in a few nanoseconds, and the peak current to do
this is of the order of 1 A. This current must flow from the
decoupling and bootstrap capacitors to the IC, and from the
output driver pin to the MOSFET gate, returning from the
MOSFET source to the IC. The aim of the layout is to reduce
the parasitic inductance of these current paths as much as
possible. This is accomplished by making these traces as
short as possible, and also running trace and its current return
path adjacent to each other.
APPLICATIONS
+V DC
C4 +
U1
+5 V
4
Q1
Si4412
0.1 m F
C3
15 m F
1
OUT H
V S
8
L1
GND
PWM IN
Enable
2
3
4
GND
IN
SD
BOOT
V DD
OUT L
Si9912
7
6
5
C1
0.1 m F
4
15 m H
Q2
Si4412
1 m F
C5
R LOAD
C2
0.1 m F
GND
GND
FIGURE 1.
Document Number: 71311
S-40134—Rev. B, 16-Feb-04
Typical Applications Schematic Circuit Used to Obtain Typical Rising and Falling Switching Waveforms
www.vishay.com
7
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