参数资料
| 型号： | SOUNDBITE |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 16/68页 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO AUDIO DEVELOPMENT |
| 标准包装： | 1 |
| 系列： | Symphony™ soundBite |
| 主要目的： | 音频，音频处理 |
| 已用 IC / 零件： | DSPB56371 |
| 主要属性： | 最高 8 通道数字音频 |
| 次要属性： | USB、I2C、SPI 接口 |
| 已供物品： | 板，缆线，CD |
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Signal/Connection Descriptions
Table 6. Interrupt and Mode Control (continued)
State
Signal Name
Type
During
Signal Description
Reset
MODB/IRQB
Input
Input
Mode Select B/External Interrupt Request B— MODB/IRQB is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODB/IRQB
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET signal
is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
MODC/IRQC
Input
Input
Mode Select C/External Interrupt Request C— MODC/IRQC is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODC/IRQC
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET signal
is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
MODD/IRQD
Input
Input
Mode Select D/External Interrupt Request D —MODD/IRQD is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODD/IRQD
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET signal
is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
RESET
Input
Input
Reset— RESET is an active-low, Schmitt-trigger input. When asserted, the chip
is placed in the Reset state and the internal phase generator is reset. The
Schmitt-trigger input allows a slowly rising input (such as a capacitor charging)
to reset the chip reliably. When the RESET signal is deasserted, the initial chip
operating mode is latched from the MODA, MODB, MODC and MODD inputs.
The RESET signal must be asserted during power up. A stable EXTAL signal
must be supplied while RESET is being asserted.
Internal Pull up resistor.
This input is 5 V tolerant.
3.7
Serial Host Interface
The SHI has five I/O signals that can be configured to allow the SHI to operate in either SPI or I 2 C mode.
DSP56371 Data Sheet, Rev. 4.1
16
Freescale Semiconductor
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