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参数资料
| 型号： | SPC5632MF0MLQA4 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144 |
| 文件页数： | 112/122页 |
| 文件大小： | 1173K |
| 代理商： | SPC5632MF0MLQA4 |
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Overview
MPC5634M Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
9
–
Real-time performance monitor
–
Instruction set enhancements for smaller more flexible code generation
–
Programmable channel mode for customization of channel operation
Enhanced queued A/D converter (eQADC)
— Two independent on-chip RSD Cyclic ADCs
–
8-, 10-, and 12-bit resolution
–
Differential conversions
–
Targets up to 10-bit accuracy at 500 KSample/s (ADC_CLK=7.5 MHz) and 8-bit accuracy at 1 MSample/s
(ADC_CLK=15 MHz) for differential conversions
–
Differential channels include variable gain amplifier for improved dynamic range (
×1; ×2; ×4)
–
Differential channels include programmable pull-up and pull-down resistors for biasing and sensor diagnostics
(200 k
Ω; 100 kΩ; low value of 5 kΩ)
–
Single-ended signal range from 0 to 5 V
–
Sample times of 2 (default), 8, 64 or 128 ADC clock cycles
–
Provides time stamp information when requested
–
Parallel interface to eQADC command FIFOs (CFIFOs) and result FIFOs (RFIFOs)
–
Supports both right-justified unsigned and signed formats for conversion results
–
Temperature sensor to enable measurement of die temperature
–
Ability to measure all power supply pins directly
— Automatic application of ADC calibration constants
–
Provision of reference voltages (25% VREF and 75% VREF) for ADC calibration purposes
—Up to 341 input channels available to the two on-chip ADCs
— Four pairs of differential analog input channels
— Full duplex synchronous serial interface to an external device
–
Has a free-running clock for use by the external device
–
Supports a 26-bit message length
–
Transmits a null message when there are no triggered CFIFOs with commands bound for external CBuffers,
or when there are triggered CFIFOs with commands bound for external CBuffers but the external CBuffers are
full
— Parallel Side Interface to communicate with an on-chip companion module
— Zero jitter triggering for queue 0. (Queue 0 trigger causes current conversion to be aborted and the queued
conversions in the CBUFFER to be bypassed. Delay from Trigger to start of conversion is 13 system clocks + 1
ADC clock.)
— eQADC Result Streaming. Generation of a continuous stream of ADC conversion results from a single eQADC
command word. Controlled by two different trigger signals; one to define the rate at which results are generated
and the other to define the beginning and ending of the stream. Used to digitize waveforms during specific
time/angle windows, e.g., engine knock sensor sampling.
— Angular Decimation. The ability of the eQADC to sample an analog waveform in the time domain, perform
FIR/IIR filtering also in the time domain, but to down sample the results in the angle domain. Resulting in a time
domain filtered result at a given engine angle.
— Priority Based CFIFOs
–
Supports six CFIFOs with fixed priority. The lower the CFIFO number, the higher its priority. When
commands of distinct CFIFOs are bound for the same CBuffer, the higher priority CFIFO is always served
first.
–
Supports software and several hardware trigger modes to arm a particular CFIFO
–
Generates interrupt when command coherency is not achieved
1. 176-pin and 208-pin packages have 34 input channels; 144-pin package has 32.
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相关代理商/技术参数 |
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|---|---|
| SPC5632MF0MLQA6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLQA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
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