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| 型号： | SPC5632MF0MLQA4 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144 |
| 文件页数： | 29/122页 |
| 文件大小： | 1173K |
| 代理商： | SPC5632MF0MLQA4 |
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MPC5634M Microcontroller Data Sheet, Rev. 6
Overview
Freescale Semiconductor
14
When multiple tasks share a resource, coherent accesses to that resource need to be supported. The INTC supports the priority
ceiling protocol for coherent accesses. By providing a modifiable priority mask, the priority can be raised temporarily so that
all tasks which share the resource can not preempt each other.
Multiple processors can assert interrupt requests to each other through software setable interrupt requests. These same software
setable interrupt requests also can be used to break the work involved in servicing an interrupt request into a high priority portion
and a low priority portion. The high priority portion is initiated by a peripheral interrupt request, but then the ISR asserts a
software setable interrupt request to finish the servicing in a lower priority ISR. Therefore these software setable interrupt
requests can be used instead of the peripheral ISR scheduling a task through the RTOS.
The INTC provides the following features:
356 peripheral interrupt request sources
8 software setable interrupt request sources
9-bit vector addresses
Unique vector for each interrupt request source
Hardware connection to processor or read from register
Each interrupt source can be programmed to one of 16 priorities
Preemptive prioritized interrupt requests to processor
ISR at a higher priority preempts executing ISRs or tasks at lower priorities
Automatic pushing or popping of preempted priority to or from a LIFO
Ability to modify the ISR or task priority to implement the priority ceiling protocol for accessing shared resources
Low latency—three clocks from receipt of interrupt request from peripheral to interrupt request to processor
This device also includes a non-maskable interrupt (NMI) pin that bypasses the INTC and multiplexing logic.
1.3.5
FMPLL
The FMPLL allows the user to generate high speed system clocks from a 4 MHz to 20 MHz crystal oscillator or external clock
generator. Further, the FMPLL supports programmable frequency modulation of the system clock. The PLL multiplication
factor, output clock divider ratio are all software configurable. The PLL has the following major features:
Input clock frequency from 4 MHz to 20 MHz
Voltage controlled oscillator (VCO) range from 256 MHz to 512 MHz, resulting in system clock frequencies from
16 MHz to 80 MHz with granularity of 4 MHz or better
Reduced frequency divider (RFD) for reduced frequency operation without forcing the PLL to relock
3 modes of operation
— Bypass mode with PLL off
— Bypass mode with PLL running (default mode out of reset)
— PLL normal mode
Each of the three modes may be run with a crystal oscillator or an external clock reference
Programmable frequency modulation
— Modulation enabled/disabled through software
— Triangle wave modulation up to 100 kHz modulation frequency
— Programmable modulation depth (0% to 2% modulation depth)
— Programmable modulation frequency dependent on reference frequency
Lock detect circuitry reports when the PLL has achieved frequency lock and continuously monitors lock status to
report loss of lock conditions
Clock Quality Module
— detects the quality of the crystal clock and cause interrupt request or system reset if error is detected
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相关代理商/技术参数 |
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|---|---|
| SPC5632MF0MLQA6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLQA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
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