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参数资料
型号： SPC5632MF0MLQA4
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： FLASH, 40 MHz, MICROCONTROLLER, PQFP144
封装： 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144
文件页数： 42/122页
文件大小： 1173K
代理商： SPC5632MF0MLQA4
MPC5634M Microcontroller Data Sheet, Rev. 6
Overview
Freescale Semiconductor
26
memory map and access to the Power Architecture and eTPU internal registers during halt. The Nexus interface also supports
a JTAG only mode using only the JTAG pins. MPC5634M in the production 144 LQFP supports a 3.3 V reduced (4-bit wide)
Auxiliary port. These Nexus port pins can also be used as 5 V I/O signals to increase usable I/O count of the device. When using
this Nexus port as IO, Nexus trace is still possible using VertiCal calibration. In the VertiCal calibration package, the full 12-bit
Auxiliary port is available.
NOTE
In the VertiCal package, the full Nexus Auxiliary port shares balls with the addresses of the
calibration bus. Therefore multiplexed address/data bus mode must be used for the
calibration bus when using full width Nexus trace in VertiCal assembly.
The following features are implemented:
5-pin JTAG port (JCOMP, TDI, TDO, TMS, and TCK)
— Always available in production package
— Supports both JTAG Boundary Scan and debug modes
— 3.3 V interface
— Supports Nexus class 1 features
— Supports Nexus class 3 read/write feature
9-pin Reduced Port interface in 144 LQFP production package
— Alternate function as IO
— 5 V (in GPIO or alternate function mode), 3.3 V (in Nexus mode) interface
— Auxiliary Output port
–
1 MCKO (message clock out) pin
–
4 MDO (message data out) pins
–2 MSEO (message start/end out) pins
–1 EVTO (event out) pin
— Auxiliary input port
–
1 EVTI (event in) pin
17-pin Full Port interface in VertiCal calibration package
— 3.3 V interface
— Auxiliary Output port
–
1 MCKO (message clock out) pin
–
4 (reduced port mode) or 12 (full port mode) MDO (message data out) pins; 8 extra full port pins shared with
calibration bus
–2 MSEO (message start/end out) pins
–1 EVTO (event out) pin
— Auxiliary input port
–
1 EVTI (event in) pin
Host processor (e200) development support features
— IEEE-ISTO 5001-2003 standard class 2 compliant
— Program trace via branch trace messaging (BTM). Branch trace messaging displays program flow discontinuities
(direct branches, indirect branches, exceptions, etc.), allowing the development tool to interpolate what transpires
between the discontinuities. Thus, static code may be traced.
— Watchpoint trigger enable of program trace messaging
— Data Value Breakpoints (JTAG feature of the e200z335 core): allows CPU to be halted when the CPU writes a
specific value to a memory location
–
4 data value breakpoints
–CPU only
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相关代理商/技术参数
参数描述
SPC5632MF0MLQA6 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs)
SPC5632MF0MLQA8 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs)
SPC5632MF0MLUA4 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs)
SPC5632MF0MLUA6 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs)
SPC5632MF0MLUA8 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs)
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