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参数资料
| 型号： | SPC5632MF0MLQA4 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144 |
| 文件页数： | 30/122页 |
| 文件大小： | 1173K |
| 代理商： | SPC5632MF0MLQA4 |
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Overview
MPC5634M Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
15
— detects the quality of the PLL output clock. If an error is detected, causes a system reset or switches the system
clock to the crystal clock and causes an interrupt request
Programmable interrupt request or system reset on loss of lock
1.3.6
Calibration EBI
The Calibration EBI controls data transfer across the crossbar switch to/from memories or peripherals attached to the VertiCal
connector in the calibration address space. The Calibration EBI is only available in the VertiCal Calibration System. The
Calibration EBI includes a memory controller that generates interface signals to support a variety of external memories. The
Calibration EBI memory controller supports legacy flash, SRAM, and asynchronous memories. In addition, the calibration EBI
supports up to three regions via chip selects (two chip selects are multiplexed with two address bits), along with programmed
region-specific attributes. The calibration EBI supports the following features:
22-bit address bus (two most significant signals multiplexed with two chip selects)
16-bit data bus
Multiplexed mode with addresses and data signals present on the data lines
NOTE
The calibration EBI must be configured in multiplexed mode when the extended Nexus
trace is used on the VertiCal Calibration System. This is because Nexus signals and address
lines of the calibration bus share the same balls in the calibration package.
Memory controller with support for various memory types:
— Asynchronous/legacy flash and SRAM
— Most standard memories used with the MPC5xx or MPC55xx family
Bus monitor
— User selectable
— Programmable time-out period (with 8 external bus clock resolution)
Configurable wait states (via chip selects)
3 chip-select (Cal_CS[0], Cal_CS[2:3]) signals (Multiplexed with 2 most significant address signals)
2 write/byte enable (WE[0:1]/BE[0:1]) signals
Configurable bus speed modes
— system frequency
— 1/2 of system frequency
— 1/4 of system frequency
Optional automatic CLKOUT gating to save power and reduce EMI
Compatible with MPC5xx external bus (with some limitations)
Selectable drive strengths; 10 pF, 20 pF, 30 pF, 50 pF
1.3.7
SIU
The MPC5634M SIU controls MCU reset configuration, pad configuration, external interrupt, general purpose I/O (GPIO),
internal peripheral multiplexing, and the system reset operation. The reset configuration block contains the external pin boot
configuration logic. The pad configuration block controls the static electrical characteristics of I/O pins. The GPIO block
provides uniform and discrete input/output control of the I/O pins of the MCU. The reset controller performs reset monitoring
of internal and external reset sources, and drives the RSTOUT pin. Communication between the SIU and the e200z335 CPU
core is via the crossbar switch. The SIU provides the following features:
System configuration
— MCU reset configuration via external pins
— Pad configuration control for each pad
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SPC5632MF0MLQA6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLQA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5632MF0MLUA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
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