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参数资料
| 型号： | SST38VF6401-90-4C-EKE |
| 厂商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分类： | PROM |
| 英文描述： | 4M X 16 FLASH 2.7V PROM, 90 ns, PDSO48 |
| 封装： | 12 X 20 MM, ROHS COMPLIANT, MO-142DD, TSOP1-48 |
| 文件页数： | 45/55页 |
| 文件大小： | 1547K |
| 代理商： | SST38VF6401-90-4C-EKE |
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Preliminary Specification
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
5
2008 Silicon Storage Technology, Inc.
S71309-03-000
08/08
The SST38VF6401/6402/6403/6404 also provide a RY/
BY# signal. This signal indicates the status of a Program or
Erase operation.
If a Program or Erase operation is attempted on a pro-
tected sector or block, the operation will abort. After the
device initiates an abort, the corresponding Write Opera-
tion Status Detection Bits will stay active for approximately
200ns (program or erase) before the device returns to read
mode.
For the status of these bits during a Write operation, see
Data# Polling (DQ7)
When the SST38VF6401/6402/6403/6404 are in an inter-
nal Program operation, any attempt to read DQ7 will pro-
duce the complement of true data. For a Program Buffer-
to-Flash operation, DQ7 is the complement of the last
word loaded in the Write-Buffer using the Write-to-Buffer
command. Once the Program operation is completed,
DQ7 will produce valid data. Note that even though DQ7
may have valid data immediately following the completion
of an internal Write operation, the remaining data outputs
may still be invalid. Valid data on the entire data bus will
appear in subsequent successive Read cycles after an
interval of 1 s.
During an internal Erase operation, any attempt to read
DQ7 will produce a ‘0’. Once the internal Erase operation
is completed, DQ7 will produce a ‘1’. The Data# Polling is
valid after the rising edge of fourth WE# (or CE#) pulse for
Program operation. For Sector-, Block- or Chip-Erase, the
Data# Polling is valid after the rising edge of sixth WE# (or
CE#) pulse. See Figure 11 for Data# Polling timing dia-
gram and Figure 26 for a flowchart.
Toggle Bits (DQ6 and DQ2)
During the internal Program or Erase operation, any con-
secutive attempts to read DQ6 will produce alternating ‘1’s
and ‘0’s, i.e., toggling between ‘1’ and ‘0’. When the internal
Program or Erase operation is completed, the DQ6 bit will
stop toggling, and the device is then ready for the next
operation. For Sector-, Block-, or Chip-Erase, the toggle bit
(DQ6) is valid after the rising edge of sixth WE# (or CE#)
pulse. DQ6 will be set to ‘1’ if a Read operation is attempted
on an Erase-Suspended Sector or Block. If Program oper-
ation is initiated in a sector/block not selected in Erase-Sus-
pend mode, DQ6 will toggle.
An additional Toggle Bit is available on DQ2, which can be
used in conjunction with DQ6 to check whether a particular
sector or block is being actively erased or erase-sus-
pended. Table 1 shows detailed bit status information. The
Toggle Bit (DQ2) is valid after the rising edge of the last
WE# (or CE#) pulse of Write operation. See Figure 12 for
Toggle Bit timing diagram and Figure 26 for a flowchart.
DQ1
If an operation aborts during a Write-to-Buffer or Program
Buffer-to-Flash operation, DQ1 is set to ‘1’. To reset DQ1 to
‘0’, issue the Write-to-Buffer Abort Reset command to exit
the abort state. A power-off/power-on cycle or a Hardware
Reset (RST# = 0) will also clear DQ1.
RY/BY#
The RY/BY# pin can be used to determine the status of a
Program or Erase operation. The RY/BY# pin is valid after
the rising edge of the final WE# pulse in the command
sequence. If RY/BY# = 0, then the device is actively pro-
gramming or erasing. If RY/BY# = 1, the device is in Read
mode. The RY/BY# pin is an open drain output pin. This
means several RY/BY# can be tied together with a pull-up
resistor to VDD..
TABLE
1: Write Operation Status
Status
DQ71
DQ6
DQ21
DQ1
RY/BY#2
Normal
Operation
Standard Program
DQ7#
Toggle
No Toggle
0
Standard Erase
0
Toggle
N/A
0
Erase-Suspend
Mode
Read from Erase-Suspended
Sector/Block
1
No toggle
Toggle
N/A
1
Read from Non- Erase-
Suspended Sector/Block
Data
1
Program
DQ7#
Toggle
N/A
0
Program Buffer-
to-Flash
Busy
DQ7#3
Toggle
N/A
0
Abort
Toggle
N/A
1
0
T1.0 1309
1. DQ7 and DQ2 require a valid address when reading status information.
2. RY/BY# is an open drain pin. RY/BY# is high in Read mode, and Read in Erase-Suspend mode.
3. During a Program Buffer-to-Flash operation, the datum on the DQ7 pin is the complement of DQ7 of the last word loaded in the Write-
Buffer using the Write-to-Buffer command.
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| SST38VF6401-90-5C-B3KE | 功能描述:闪存 64M (4Mx16) 90ns 2.7-3.6V Commercial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST38VF6401-90-5C-EKE | 功能描述:闪存 64M (4Mx16) 90ns 2.7-3.6V Commercial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST38VF6401-90-5C-EKE-T | 功能描述:闪存 2.7 to 3.6V 64Mbit Parallel Adv MPF+ RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST38VF6401-90-5I-B3KE | 功能描述:闪存 2.7 to 3.6V 64Mbit Parallel Adv MPF+ RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST38VF6401-90-5I-B3KE-T | 制造商:Microchip Technology 功能描述:Flash Parallel 3.3V 64Mbit 4M x 16bit 90ns 48-Pin TFBGA T/R 制造商:Microchip Technology Inc 功能描述:2.7V TO 3.6V 64MBIT PM PARALLEL ADVANCED MPF+ - Tape and Reel 制造商:Microchip Technology Inc 功能描述:IC FLASH 64MBIT 90NS 48TFBGA 制造商:Microchip Technology Inc 功能描述:2.7Vto3.6V 64Mb ParAdvanced MPF+ |
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