Multiplier-accumulator unit
ST10F252M
The parallel data move shifts a table of operands in parallel with a computation on those
operands. Its specific use is for signal processing algorithms like filter computation.
Figure 8gives an example of parallel data move with CoMACM instruction.
6.2.4
16 x 16 signed / unsigned parallel multiplier
The multiplier executes 16 x 16-bit parallel signed/unsigned fractional and integer multiplies.
The multiplier has two 16-bit input ports, and a 32-bit product output port. The input ports
can accept data from the MA-bus and from the MB-bus. The output is sign-extended and
feeds a scaler that shifts the multiplier output according to the shift mode bit MP specified in
the co-processor control word (MCW). The product can be shifted one bit left to compensate
for the extra sign bit gained in multiplying two 16-bit signed (2’s complement) fractional
numbers if bit MP is set.
6.2.5
40-bit signed arithmetic unit
The arithmetic unit is over 32 bits wide to allow intermediate overflow in a series of
multiply/accumulate operations. The extension flag E, contained in the most significant byte
of MSW, is set when the accumulator has overflowed beyond the 32-bit boundary, that is,
when there are significant (non-sign) bits in the top eight (signed arithmetic) bits of the
accumulator.
The 40-bit arithmetic unit has two 40-bit input ports A and B. The A-input port accepts data
from four possible sources: 00,0000,0000h, 00,0000,8000h (round), the sign-extended
product, or the sign-extended data conveyed by the 32-bit bus resulting from the
concatenation of MA- and MB-buses. Product and concatenation can be shifted left by one
according to MP for the multiplier or to the instruction for the concatenation. The B-input port
is fed either by the 40-bit shifted/not shifted and inverted/not inverted accumulator or by
00,0000,0000h. A-input and B-input ports can receive 00,0000,0000h to allow direct
transfers from the B-source and A-source, respectively, to the accumulator (in the case of
multiplication or shift). The output of the arithmetic unit goes to the accumulator.
It is also possible to saturate the accumulator on a 32-bit value, automatically after every
accumulation. Automatic saturation is enabled by setting the saturation bit MS in the MCW
register. When the accumulator is in the saturation mode and an 32-bit overflow occurs, the
accumulator is loaded with either the most positive or the most negative value representable
in a 32-bit value, depending on the direction of the overflow. The value of the accumulator
upon saturation is 00,7fff,ffffh (positive) or ff,8000,0000h (negative) in signed arithmetic.
Automatic saturation sets the SL flag MSW. This flag is a sticky flag which means it stays set
until it is explicitly reset.
40-bit overflow of the accumulator sets the SV flag in MSW. This flag is also a sticky flag.
Figure 8.
Example of parallel data move
CoMACM [IDX0+], [R2+]
X
n+2
n
n-2
n-4
16-bit
IDX0
X
n+2
n
n-2
n-4
IDX0
Parallel Data Move
After Execution
Before Execution