![](http://datasheet.mmic.net.cn/140000/ST10F252M-4T3_datasheet_5015256/ST10F252M-4T3_90.png)
Parallel ports
ST10F252M
state and is not affected by the alternate output function. The respective port latch should
hold a ‘1’, because its output is ANDed with the alternate output data (except for PWM
output signals).
If an alternate input function of a pin is used, the direction of the pin must be programmed
for input (DPx.y=‘0’) if an external device is driving the pin. The input direction is the default
after reset. If no external device is connected to the pin, however, the direction for this pin
can also be set to output. In this case, the pin reflects the state of the port output latch.
Thus, the alternate input function reads the value stored in the port output latch. This can be
used for testing purposes to allow a software trigger of an alternate input function by writing
to the port output latch.
On most of the port lines, user software is responsible for setting the proper direction when
using an alternate input or output function of a pin. This is done by setting or clearing the
direction control bit DPx.y of the pin before enabling the alternate function. There are port
lines, however, where the direction of the port line is switched automatically. For instance, in
the multiplexed external bus modes of PORT0, the direction must be switched several times
for an instruction fetch to output the addresses and to input the data. Obviously, this cannot
be done through instructions. In these cases, the direction of the port line is switched
automatically by hardware if the alternate function of such a pin is enabled. To determine the
appropriate level of the port output latches check how the alternate data output is combined
with the respective port latch output.
There is one basic structure for all port lines with only an alternate input function. Port lines
with only an alternate output function, however, have different structures due to the way the
direction of the pin is switched and depending on whether the pin is accessible by the user
software or not in the alternate function mode.
All port lines that are not used for these Alternate Functions may be used as general
purpose I/O lines. When using port pins for general purpose output, the initial output value
should be written to the port latch prior to enabling the output drivers, to avoid undesired
transitions on the output pins. This applies to single pins as well as to pin groups (see
examples below).
Note:
When using several BSET pairs to control more pins of one port, these pairs must be
separated by instructions, which do not reference the respective port.
13.3
PORT0
The two 8-bit ports P0H and P0L represent the higher and lower part of PORT0,
respectively. Both halves of PORT0 can be written (for example, via a PEC transfer) without
affecting the other half.
SINGLE_BIT:
BSET
P4.7
; Initial output level is “high”
BSET
DP4.7
; Switch on the output driver
BIT_GROUP:
BFLDH
P4, #24H, #24H
; Initial output level is “high”
BFLDH
DP4, #24H, #24H
; Switch on the output drivers