4 System configuration
ST40RA166
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Third parties include:
q
Microsoft: WindowsCE,
q
Sun: JavaOS for consumers,
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WindRiver: VxWorks, Tornado tools,
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Linux,
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Insignia JVM,
q
ANT browser.
3.5.2
Software compatibility
SH-4 core software
The ST40RA166 SH-4 core is binary code compatible with the Hitachi SH775x family.
Standard peripheral driver
The ST40 standard SCIF, timer, real-time clock and PIO are compatible with the ST40 SOC range of
devices and the Hitachi SH775x family.
Bus interface driver
The PCI, LMI, and EMI interfaces are register compatible with the ST40 SOC range of devices.
The ST40RA166 contains an EMPI and MPX arbiter and MPX clock control unit which are
additional to the bus interface components of the ST40 SOC range of devices.
I/O device driver
The Mailbox is a module with no ST legacy software.
4
System configuration
The ST40RA166 system address map has been designed to maintain compatibility with existing
ST40 family devices and other STMicroelectronics devices.
The SH-4 core and core peripherals maintain compatibility with the ST40 SOC range of devices and
Hitachi SH7750 wherever possible.
Devices listed in
Table 1: ST40RA166 system address map on page 13, are documented in the
ST40 System Architecture Manual as described in Chapter 2: ST40 documentation suite on page 6.
Coherency between the cache and external memory is assured by software. The ST40 CPU has
cache control instructions which enable software to do this. Details of these instructions are given in
the
ST40 CPU Core Architecture Manual.
The ST40RA166 is run in little endian mode.
The ST40RA166 power on configuration is controlled by the MODE pins as defined in
Table 33:
Mode selection pins for ST40RA166 on page 56.
Subsystem configuration registers are usually found with the module register space. Other system
level functions and the software register locations are shown in
Table 9: System configuration
registers on page 21.