- 您现在的位置：买卖IC网 > PDF目录98143 > ST40RA150XH6 (STMICROELECTRONICS) 32-BIT, 150 MHz, RISC PROCESSOR, PBGA372 PDF资料下载
参数资料
| 型号： | ST40RA150XH6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 150 MHz, RISC PROCESSOR, PBGA372 |
| 封装： | 27 X 27 MM, BGA-372 |
| 文件页数： | 30/90页 |
| 文件大小： | 672K |
| 代理商： | ST40RA150XH6 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页当前第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页
36/88
ST40RA166
5 Clock generation
Power down is initiated with the sleep instruction and the power down mode is selected with bit 7 of
the CPG.STBCR register. If the bit is set, the CPU enters standby mode on the next sleep instruction,
and if unset it enters sleep mode.
5.5.2
Module low-power modes
Modules are powered down in two ways, depending on whether the module is a ST40 legacy
peripheral (controlled by the CPG register bank) or a ST40RA166 peripheral (controlled by the
CLOCKGEN
register banks).
A module controlled by the CPG register bank has its clock stopped when the corresponding bit in
the CPG.STBCR or CPG.STBCR2 register is set. The clock is started again when the bit is cleared.
To request the power down of a module controlled by the CLOCKGENA or CLOCKGENB register bank, 1
is written to the corresponding bit in the STBREQCR_SET register. When the module has completed
its power down sequence and its clock has been stopped, the corresponding bit in the STBACKCR
register is set. To restart the module, 1 is written to the corresponding bit in the STBREQCR_CLR
register.
Note:
The modules governed by the CLOCKGENB register bank do not support hardware-only power down
and require software interaction to maintain data coherency before making a request to stop the
module clock.
5.6
Clock generation registers
5.6.1
CLOCKGENB.CLK_SELCR register
CLOCKGENB.CLK_SELCR
Clock source selection
0x0068
The CLKGENB.CLK_SELCR register controls the selection of clock domain clock sources
0
LMI_SEL
Reserved
Reset state: 0
1
PCI_SEL
Select PCI clock
0: PCI_SS_CLK from CLOCKGENA_12
1: PCI_SS_CLK from CLOCKGENA_13
Reset state: 0
RW
[2:3]
EMI_SEL
Select EMI clock
00: EMI_SS_CLK from CLOCKGENA_12
01: EMI_SS_CLK from CLOCKGENA_13
10: EMI_SS_CLK from CLOCKGENA_14
11: EMI_SS_CLK from CLOCKGENB_12
Reset state: 00
RW
[4:7]
EXT_CLK_SEL
Not used
Reset state: 0000
[8:31]
Reserved
Reset state: 0
RW
相关PDF资料 |
PDF描述 |
|---|---|
| ST40RA200XH6E | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA372 |
| ST52510F3M6 | MICROCONTROLLER, PDSO20 |
| ST52E430B/D | 8-BIT, UVPROM, 20 MHz, MICROCONTROLLER, CDIP32 |
| ST52F510F1M6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDSO20 |
| ST52F510G0B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST40RA150XHA | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32-bit Embedded SuperH Device |
| ST40RA166 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32-BIT EMBEDDED SUPERH MICROPROCESSOR |
| ST40RA166XH1 | 制造商:STMicroelectronics 功能描述: |
| ST40RA166XH6 | 制造商:STMicroelectronics 功能描述:32-BIT SUPERH CPU - Trays |
| ST40RA166XH6/TR | 制造商:STMicroelectronics 功能描述: |
发布紧急采购，3分钟左右您将得到回复。