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参数资料
| 型号： | ST5451D |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO28 |
| 封装： | SO-28 |
| 文件页数： | 29/34页 |
| 文件大小： | 269K |
| 代理商： | ST5451D |
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2 - FUNCTIONS
2 - 1 - Basic HDLC Functions
2 - 1 - 1 - In Receive Direction:
- Channel selection
In GCI channel B1 or B2 or D may be selected.
B1 or B2 may be selected without M and C/I
channels
- Flag detection
A zero followed by six consecutive ones and an-
other zero is recognized as a flag
- Zero delete
A zero, after five consecutive ones within an
HDLC frame, is deleted
- CRC checking
The CRC field is checked according to the gen-
erator polynomial
X
16 +X12 +X5 +1
- Check for abort
Seven or more consecutive ones are interpreted
as an abort flag
- Check for idle
Fifteen or more consecutive ones are inter-
preted as ”idle”
- Minimum lenght checking
HDLC frames with less than n bytes between
start and end flag are ignored: allowed val-
ues are 3
≤ n ≤ 6.
This value is set by a programmable register
- Address Field recognition
4 SAPI and/or 3 TEI may be recognized. Sev-
eral programmable registers indicate the recog-
nized address types.
2 - 1 - 2 - In Transmit Direction:
- Shift control in TE mode
D channel data are signalled by DEN pin.
- Flag generation
A flag is generated at the beginning and at the
end of every frame.
- Zero insert
A zero is inserted after five consecutive ones
within an HDLC frame
- CRC generation
The CRC field of the transmitted frame is gener-
ated according to the generator polynomial
X
16 +X12 +X5 +1
- Abort sequence generation
An HDLC frame may be terminated with an
abort sequence under microprocessor control
- Interframe time fill
Flags or idle (consecutive ones) may be trans-
mitted during the interframe time. A programma-
ble bit selects the mode.
NON GCI INTERFACE
NAME
PIN
TYPE
FUNCTION
DOUT
15
O
Data output. Digital output for serial data. Three modes:
- HDLC Protocol multiplexed link
- HDLC Protocol non multiplexed link
- Non HDLC protocol (transparent Mode).
DIN
12
I
Data input. Digital input for serial data. Three modes (See DOUT).
CLK
11
I
Data Clock. It determines the data shift rate. Two modes: Single or
double bit rate.
FS
13
I
Frame synchronization. Used in mode HDCL protocol multiplexed
link. Don’t care in other modes. The rising edge gives the time
reference of the first bit of the frame.
DEN
10
I
Data Enable. When high, enable the data transfer. on DOUT
OTHERS
NAME
PIN
TYPE
FUNCTION
VDD
28
I
Positive power supply = 5V +5%
VSS
14
I
Signal ground
RST
16
I
Reset
ST
9
I
Special Test. (Reserved) must be tied to VSS
ST5451
4/34
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST5451L | 制造商:Valor 功能描述: |
| ST5451N | 制造商:未知厂家 制造商全称:未知厂家 功能描述:ISDN， Other/Special/Miscellaneous |
| ST5452L | 制造商:Pulse 功能描述:- Bulk |
| ST5453L | 制造商:Pulse 功能描述:- Bulk |
| ST5454L | 制造商:Pulse 功能描述:- Bulk |
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