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参数资料
| 型号： | ST5451D |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO28 |
| 封装： | SO-28 |
| 文件页数： | 32/34页 |
| 文件大小： | 269K |
| 代理商： | ST5451D |
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3 - REGISTER DESCRIPTION
For all the register pictures MSB is on the left and
LSB on the right
If not otherwise stated bit are considered active at 1.
FIFOS
RFIFO (read), XFIFO (write).
The address range of the two FIFOs are identical.
All the 32 addresses give access to the ”current”
FIFO location.
When the closing Flag of a receive frame is de-
tected, a status byte is available in the RFIFO.
This byte has the following format:
RBC
RDO
CRC
RAB
0
RBC
Receive Byte Count.
The length of the received frame is n
time 8 bits (n=3,4,5,...)
RDO
Receive Data Overflow
A part of the frame has not been lost
because the receive FIFO was full
CRC
CRC Check
The received CRC bytes were not correct
RAB
Receive Abort
The received frame was not aborted
A status byte equal to D0H indicates a correctly
received frame
ISTA0
Interrupt Status Register 0
After RESET 10H
RME
RPF
RFO
XPR
XDU
EXI2
EXI1
0
RME
Receive Message End
One complete frame of length less than
or equal to 32 bytes, or the last part of
a frame of length greater than 32 bytes
is stored in the RFIFO.
RPF
Receive Pool Full
32 bytes of a frame are in RFIFO. The
frame is not yet completely received.
RFO
Receive Frame Overflow
A complete frame was lost because no
storage space was available in the
RFIFO.
XPR
Transmit Pool Ready
One data block (32 bytes max) may be
entered into the XFIFO.
XDU
Transmit Data Underrun
A transmitted frame was terminated
with an abort sequence because no
data were available for transmission in
XFIFO and no XME command was is-
sued. It is not possible to transmit
frame when that interrupt remains un-
acknowledged and XRES has not been
set.
EXI2
Extended Interrupt 2
The interrupt reason is indicated in reg-
ister ISTA2
EXI1
Extented Interrupt1
The interrupt reason is indicated in reg-
ister ISTA1.
ISTA1
Interrupt Status Register 1
After RESET 01H
(GCI mode only)
0
CIC1
EOM1 XAB1 RMR1 RAB1 XMR1
CIC1
Comman/Indicate Change
A change in the value of CIR1 is de-
tected
EOM1
End of Message 1 (monitor channel)
MON1 has received an end of mes-
sage.
XAB1
Monitor Transmit ABORT
The received byte has not been de-
tected in two successive frames.
MON1 has sent an ABORT (A bit) to
the remote transmitter.
RMR1
Receive Monitor Register 1 ready
A byte has been received in register
MONR1.
RAB1
Receive Abort
MON1 received an ABORT from the re-
mote receiver.
XMR1
Transmit Monitor Register 1 ready
A byte can be stored in register
MONX1
ISTA2
Interrupt Status Register 2
After RESET 01H
(GCI and TE mode only)
0
CIC2
EOM2 XAB2 RMR2 RAB2 XMR2
CIC2
Command/Indicate Change
A change in the value of CIR2 is de-
tected.
ST5451
7/34
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相关代理商/技术参数 |
参数描述 |
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| ST5451L | 制造商:Valor 功能描述: |
| ST5451N | 制造商:未知厂家 制造商全称:未知厂家 功能描述:ISDN， Other/Special/Miscellaneous |
| ST5452L | 制造商:Pulse 功能描述:- Bulk |
| ST5453L | 制造商:Pulse 功能描述:- Bulk |
| ST5454L | 制造商:Pulse 功能描述:- Bulk |
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