- 您现在的位置：买卖IC网 > PDF目录98145 > ST72E734J6D0 (STMICROELECTRONICS) 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP42 PDF资料下载
参数资料
| 型号： | ST72E734J6D0 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP42 |
| 封装： | CERAMIC, SDIP-42 |
| 文件页数： | 53/144页 |
| 文件大小： | 1280K |
| 代理商： | ST72E734J6D0 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页当前第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页
ST72774/ST727754/ST72734
16/144
CPU REGISTERS (Cont’d)
CONDITION CODE REGISTER (CC)
Read/Write
Reset Value: 111x1xxx
The 8-bit Condition Code register contains the
interrupt mask and four flags representative of the
result of the instruction just executed. This register
can also be handled by the PUSH and POP
instructions.
These bits can be individually tested and/or
controlled by specific instructions.
Bit 4 = H
Half carry.
This bit is set by hardware when a carry occurs
between bits 3 and 4 of the ALU during an ADD or
ADC instruction. It is reset by hardware during the
same instructions.
0: No half carry has occurred.
1: A half carry has occurred.
This bit is tested using the JRH or JRNH
instruction. The H bit is useful in BCD arithmetic
subroutines.
Bit 3 = I
Interrupt mask.
This bit is set by hardware when entering in
interrupt or by software to disable all interrupts
except the TRAP software interrupt. This bit is
cleared by software.
0: Interrupts are enabled.
1: Interrupts are disabled.
This bit is controlled by the RIM, SIM and IRET
instructions and is tested by the JRM and JRNM
instructions.
Note: Interrupts requested while I is set are
latched and can be processed when I is cleared.
By default an interrupt routine is not interruptable
because the I bit is set by hardware when you
enter it and reset by the IRET instruction at the end
of the interrupt routine. If the I bit is cleared by
software in the interrupt routine, pending interrupts
are serviced regardless of the priority level of the
current interrupt routine.
Bit 2 = N
Negative.
This bit is set and cleared by hardware. It is
representative of the result sign of the last
arithmetic, logical or data manipulation. It is a copy
of the 7th bit of the result.
0: The result of the last operation is positive or null.
1: The result of the last operation is negative
(i.e. the most significant bit is a logic 1).
This bit is accessed by the JRMI and JRPL
instructions.
Bit 1 = Z
Zero.
This bit is set and cleared by hardware. This bit
indicates that the result of the last arithmetic,
logical or data manipulation is zero.
0: The result of the last operation is different from
zero.
1: The result of the last operation is zero.
This bit is accessed by the JREQ and JRNE test
instructions.
Bit 0 = C
Carry/borrow.
This bit is set and cleared by hardware and
software. It indicates an overflow or an underflow
has occurred during the last arithmetic operation.
0: No overflow or underflow has occurred.
1: An overflow or underflow has occurred.
This bit is driven by the SCF and RCF instructions
and tested by the JRC and JRNC instructions. It is
also affected by the “bit test and branch”, shift and
rotate instructions.
70
11
1
H
I
N
Z
C
相关PDF资料 |
PDF描述 |
|---|---|
| ST72T774S9T1 | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP44 |
| ST7294C6B6 | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDIP28 |
| ST72T94C6M6 | 8-BIT, OTPROM, MICROCONTROLLER, PDSO28 |
| ST72C171K2B6 | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32 |
| ST72E85A5G0 | 8-BIT, UVPROM, 4.332 MHz, MICROCONTROLLER, CQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST72F260G1B5 | 功能描述:8位微控制器 -MCU Flask 4K SPI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| ST72F260G1M6 | 功能描述:8位微控制器 -MCU Flash 4K SPI/I2C/SCI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| ST72F260G1M6/TR | 功能描述:8位微控制器 -MCU 8B MCU FLASH OR ROM MEMORY RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| ST72F262G1B5 | 功能描述:8位微控制器 -MCU Flask 4K SPI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| ST72F262G1B6 | 功能描述:8位微控制器 -MCU 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
发布紧急采购，3分钟左右您将得到回复。