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参数资料
型号： ST72E734J6D0
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP42
封装： CERAMIC, SDIP-42
文件页数： 94/144页
文件大小： 1280K
代理商： ST72E734J6D0
ST72774/ST727754/ST72734
53/144
16-BIT TIMER (Cont’d)
STATUS REGISTER (SR)
Read Only
Reset Value: 0000 0000 (00h)
The three least significant bits are not used.
Bit 7 = ICF1
Input Capture Flag 1.
0: No input capture (reset value).
1: An input capture has occurred. To clear this
bit, first read the SR register, then read or
write the low byte of the IC1R (IC1LR) regis-
ter.
Bit 6 = OCF1
Output Compare Flag 1.
0: No match (reset value).
1: The content of the free running counter has
matched the content of the OC1R register. To
clear this bit, first read the SR register, then
read or write the low byte of the OC1R
(OC1LR) register.
Bit 5 = TOF
Timer Overflow.
0: No timer overflow (reset value).
1:The free running counter rolled over from
FFFFh to 0000h. To clear this bit, first read
the SR register, then read or write the low
byte of the CR (CLR) register.
Note: Reading or writing the ACLR register does not clear
TOF.
Bit 4 = ICF2
Input Capture Flag 2.
0: No input capture (reset value).
1: An input capture has occurred.To clear this
bit, first read the SR register, then read or
write the low byte of the IC2R (IC2LR) regis-
ter.
Bit 3 = OCF2
Output Compare Flag 2.
0: No match (reset value).
1: The content of the free running counter has
matched the content of the OC2R register. To
clear this bit, first read the SR register, then
read or write the low byte of the OC2R
(OC2LR) register.
Bit 2-0 = Unused.
INPUT CAPTURE 1 HIGH REGISTER (IC1HR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
input capture 1 event).
INPUT CAPTURE 1 LOW REGISTER (IC1LR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the
input capture 1 event).
OUTPUT
COMPARE
1
HIGH
REGISTER
(OC1HR)
Read/Write
Reset Value: 1000 0000 (80h)
This is an 8-bit register that contains the high part
of the value to be compared to the CHR register.
OUTPUT
COMPARE
1
LOW
REGISTER
(OC1LR)
Read/Write
Reset Value: 0000 0000 (00h)
This is an 8-bit register that contains the low part of
70
ICF1
OCF1
TOF
ICF2
OCF2
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
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