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参数资料
| 型号： | STPCC0175BTI3 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 75 MHz, MICROPROCESSOR, PBGA388 |
| 封装： | PLASTIC, BGA-388 |
| 文件页数： | 13/47页 |
| 文件大小： | 747K |
| 代理商： | STPCC0175BTI3 |
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PIN DESCRIPTION
20/47
Issue 1.6
LA[21]/PCS3#
Unlatched Address (ISA)/
Primary Chip Select (IDE). This pin has
two functions, depending on whether the
ISA bus is active or the IDE bus is active.
When the ISA bus is active, this pins is
ISA Bus unlatched address bit 21 for 16-
bit devices. When ISA bus is accessed
by any cycle initiated from PCI bus, this
pin is in output mode. When an ISAbus
master owns the bus, this pins is in input
mode.
When the IDE bus is active, this signals is
used as the active high primary slave IDE
chip select signal. This signal is to be
externally NANDed with the ISAOE#
signal before driving the IDE devices to
guarantee it is active only when ISA bus
is idle.
LA[20]/PCS1#
Unlatched Address (ISA)/
Primary Chip Select (IDE). This pin has
two functions, depending on whether the
ISA bus is active or the IDE bus is active.
When the ISA bus is active, this pins is
ISA Bus unlatched address bit 20 for 16-
bit devices. When the ISA bus is
accessed by any cycle initiated from PCI
bus, this pin is in output mode. When an
ISA bus master owns the bus, this pins is
in input mode.
When the IDE bus is active, this signals is
used as the active high primary slave IDE
chip select signal. This signal is to be
externally NANDed with the ISAOE#
signal before driving the IDE devices to
guarantee it is active only when ISA bus
is idle.
LA[19:17]/DA[2:0]
Unlatched Address
(ISA)/Address (IDE). These pins are
multi-function pins. They are used as the
ISA bus unlatched address bits [19:17]
for ISA bus or the three address bits for
the IDE bus devices.
When used by the ISA bus, these pins
are ISA Bus unlatched address bits 19-
17 on 16-bit devices. When the ISA bus
is accessed by any cycle initiated from
the PCI bus, these pins are in output
mode. When an ISA bus master owns the
bus, these pins are tristated.
For IDE devices, these signals are used
as the DA[2:0] and are connected directly
or through a buffer to DA[2:0] of the IDE
devices. If the toggling of signals are to
be masked during ISA bus cycles, they
can be externally ORed before being
connected to the IDE devices.
SA[19:8]/DD[11:0]
Unlatched Address
(ISA)/Data
Bus
(IDE).
These
are
multifunction pins. When the ISA bus is
active, they are used as the ISA bus
system address bits 19-8. When the IDE
bus is active, they serve as IDE signals
DD[11:0].
These pins are used as an input when an
ISA bus master owns the bus and are
outputs at all other times.
IDE devices are connected to SA[19:8]
directly and the ISA bus is connected to
these
pins
through
two
LS245
transceivers. The tranceiver OEs are
connected to ISAOE# and the DIR is
connected to MASTER#. The tranceiver
bus signals are connected to the CPC
and IDE DD busses and B bus signals
are connected to ISA SA bus.
DD[15:12]
Databus (IDE). The high 4 bits
of the IDE databus are combined with
several of the X-bus lines. Refer to the
following section for X-bus pins for further
information.
SA[7:0]
ISA Bus address bits [7:0].
These are the 8 low bits of the system
address bus of ISA on 8-bit slot. These
pins are used as an input when an ISA
bus master owns the bus and are outputs
at all other times.
SD[15:0]
I/O Data Bus (ISA). These pins
are the external databus to the ISA bus.
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