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| 型号： | TMP86CH47IUG |
| 厂商： | Toshiba Corporation |
| 英文描述： | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 17.5 to 18.3; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| 中文描述： | 8位微控制器 |
| 文件页数： | 24/160页 |
| 文件大小： | 1627K |
| 代理商： | TMP86CH47IUG |
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Page 16
2. Operational Description
2.2 System Clock Controller
TMP86CH47IUG
Note 8: Before setting TGHALT to “1”, be sure to stop peripherals. If peripherals are not stopped, the interrupt latch of peripherals
may be set after IDLE0 or SLEEP0 mode is released.
2.2.4
Operating Mode Control
2.2.4.1
STOP mode
STOP mode is controlled by the system control register 1, the
STOP
pin input and key-on wakeup input
(STOP5 to STOP2) which are controlled by the STOP mode release control register (STOPCR).
The
STOP
pin is also used both as a port P20 and an
INT5
(external interrupt input 5) pin. STOP mode is
started by setting SYSCR1<STOP> to “1”. During STOP mode, the following status is maintained.
1. Oscillations are turned off, and all internal operations are halted.
2. The data memory, registers, the program status word and port output latches are all held in the
status in effect before STOP mode was entered.
3. The prescaler and the divider of the timing generator are cleared to “0”.
4. The program counter holds the address 2 ahead of the instruction (e.g., [SET (SYSCR1).7])
which started STOP mode.
STOP mode includes a level-sensitive mode and an edge-sensitive mode, either of which can be
selected with the SYSCR1<RELM>. Do not use any key-on wakeup input (STOP5 to STOP2) for releas-
ing STOP mode in edge-sensitive mode.
Note 1: The STOP mode can be released by either the STOP or key-on wakeup pins (STOP5 to STOP2).
However, because the STOP pin is different from the key-on wakeup and can not inhibit the release
input, the STOP pin must be used for releasing STOP mode.
Note 2: During STOP period (from start of STOP mode to end of warm up), due to changes in the external
interrupt pin signal, interrupt latches may be set to “1” and interrupts may be accepted immediately
after STOP mode is released. Before starting STOP mode, therefore, disable interrupts. Also, before
enabling interrupts after STOP mode is released, clear unnecessary interrupt latches.
(1)
Level-sensitive release mode (RELM = “1”)
In this mode, STOP mode is released by setting the
STOP
pin high or detecting low level input for
the STOP5 to STOP2 pins which are enabled by STOPCR. This mode is used for capacitor backup
when the main power supply is cut off and long term battery backup.
Even if an instruction for starting STOP mode is executed while
STOP
pin input is high or STOP5
to STOP2 inputs are low, STOP mode does not start but instead the warm-up sequence starts imme-
diately. Thus, to start STOP mode in the level-sensitive release mode, it is necessary for the program
to first confirm that the
STOP
pin input is low and the STOP5 to STOP2 inputs are high. The follow-
ing two methods can be used for confirmation.
1. Testing a port.
2. Using an external interrupt input
INT5
(
INT5
is a falling edge-sensitive input).
Example 1 :Starting STOP mode from NORMAL mode by testing a port P20.
LD
(SYSCR1), 01010000B
; Sets up the level-sensitive release mode
SSTOPH:
TEST
(P2PRD). 0
; Wait until the
STOP
pin input goes low level
JRS
F, SSTOPH
DI
; IMF
←
0
SET
(SYSCR1). 7
; Starts STOP mode
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相关代理商/技术参数 |
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|---|---|
| TMP86CH47SUG | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
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| TMP86CH72FG | 制造商:Toshiba America Electronic Components 功能描述:TLCS870/C 16K ROM , VFT - Rail/Tube |
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