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参数资料
| 型号： | TMS470R1VF346BPZQ |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 48 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | PLASTIC, LQFP-100 |
| 文件页数： | 6/56页 |
| 文件大小： | 779K |
| 代理商： | TMS470R1VF346BPZQ |
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TMS470R1VF336A, TMS470R1VF346A
16/32-BIT RISC FLASH MICROCONTROLLERS
SPNS079I – OCTOBER 2002 – REVISED SEPTEMBER 2006
14
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
Note: The flash external pump voltage (VCCP) is required for all operations (program, erase, and read).
flash pipeline mode
When in pipeline mode, the flash operates with a system clock frequency of up to 48 MHz (versus a system
clock in normal mode of up to 28 MHz). Flash in pipeline mode is capable of accessing 64-bit words and provides
two 32-bit pipelined words to the CPU. Also in pipeline mode, the flash can be read with no wait states when
memory addresses are contiguous (after the initial 1-or 2-wait-state reads).
Note: After a system reset, pipeline mode is disabled (ENPIPE bit [FMREGOPT.0] is a "0"). In other words,
the VF3x6A device powers up and comes out of reset in non-pipeline mode. Furthermore, setting the flash
configuration mode bit (GLBCTRL.4) will override pipeline mode.
flash program and erase
The VF3x6A device flash has one 128K-byte bank that consists of ten sectors. These ten sectors are shown
in Table 3.
Table 3. Flash Sectors
The minimum size for an erase operation is one sector. The maximum size for a program operation is one
16-bit word.
Note: The flash external pump voltage (VCCP) is required for all operations (program, erase, and read).
For more detailed information on flash program and erase operations, see the TMS470R1x F05 Flash Reference
Guide (literature number SPNU213).
HET RAM
The VF3x6A device contains HET RAM. The HET RAM has a 64-instruction capability. The HET RAM is
configurable by the SYS module to be addressed within the range of 0x0000_0000 to 0xFFE0_0000. The HET
RAM is addressed through memory select 4.
XOR share
The VF3x6A HET peripheral contains the XOR-share feature. This feature allows two adjacent HET high-
resolution channels to be XORed together, making it possible to output smaller pulses than a standard HET.
For more detailed information on the HET XOR-share feature, see the TMS470R1x High-End Timer (HET)
Reference Guide (literature number SPNU199).
SECTOR
NO.
SEGMENT
LOW ADDRESS
HIGH ADDRESS
0
8K Bytes
0x0000_0000
0x0000_1FFF
1
8K Bytes
0x0000_2000
0x0000_3FFF
2
16K Bytes
0x0000_4000
0x0000_7FFF
3
16K Bytes
0x0000_8000
0x0000_BFFF
4
16K Bytes
0x0000_C000
0x0000_FFFF
5
16K Bytes
0x0001_0000
0x0001_3FFF
6
16K Bytes
0x0001_4000
0x0001_7FFF
7
16K Bytes
0x0001_8000
0x0001_BFFF
8
8K Bytes
0x0001_C000
0x0001_DFFF
9
8K Bytes
0x0001_E000
0x0001_FFFF
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相关代理商/技术参数 |
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