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| 型号： | TPS65040ZQER |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 8-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA71 |
| 封装： | 5 X 5 MM, 0.50 MM PITCH, GREEN, PLASTIC, MICRO, BGA-71 |
| 文件页数： | 2/73页 |
| 文件大小： | 1928K |
| 代理商： | TPS65040ZQER |
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ELECTRICAL CHARACTERISTICS (continued)
SLVS708B – NOVEMBER 2006 – REVISED APRIL 2007
Over recommended input conditions, T
A = –30°C to 85°C, typical values are VBAT = 3.8 V, VIO1V8 = 1.85 V at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V12_V28RX (LOW DROPOUT OUTPUT)
Normal mode output voltage
ILOAD(V12) = 10 mA
2.79
2.85
2.92
VO(V12)
V
Low power mode output
ILOAD(V12)= 1 mA
2.79
2.85
2.91
voltage
V_LNA_FEM is off
95
mA
Normal mode Maximum
output current
V_LNA_FEM is on, ILOAD(V_LNA_FEM) = 30 mA
65
mA
IO(V12)
Low power mode maximum
V_LNA_FEM is off
5
mA
output current
VO(V12_ACC)
Total output accuracy(1)
–4%
4%
ICL(V12)
Current limit protection(2)
VO(V12) = 0 V
160
270
mA
VSAT(V12)
Output saturation voltage(2)
0.3
V
ISD(V12)
Shutdown current(3)
VBN4 pin at TA = 25°C
1
A
Normal mode quiescent
VBN4 pin, ILOAD(V12) = 0 mA at TA = 25°C
40
60
current
V11_V28TX, V13_V28A and V15_V18A are off
IQ(V12)
A
Low power mode quiescent
VBN4 pin, ILOAD(V12) = 0 mA at TA = 25°C
1.2
3
current
V11_V28TX, V13_V28A and V15_V18A are off
VBAT = 3.1 V ~ 4.5 V, ILOAD(V12) = 95 mA,
VREG(V12)
Line regulation(2)
0.1
0.4
%/V
V_LNA_FEM is off
IREG(V12)
Load regulation(2)(4)
ILOAD(V12) = 10 A to 95 mA, V_LNA_FEM is off
50
100
mV
ILOAD(V12) = 10 A to 95 mA, ITR = 1 s
130
160
mV
ITR(V12)
Load Transient(2)(4)(5)
ILOAD(V12) = 95 mA to 10 A, ITF = 1 s
130
160
mV
VBAT = 3.8 V, FRIPPLE = 1 kHz, ILOAD(V12) = 95 mA,
60
dB
V_LNA_FEM is off
Power supply ripple
PSRR(V12)
rejection(2)(4)(6)
VBAT = 3.8 V, FRIPPLE = 100 kHz,
45
dB
ILOAD(V12) = 95 mA, V_LNA_FEM is off
ILOAD(V12) = 5 mA, V_LNA_FEM is off,
VON(V12)
Output noise(2)(4)
30
Vrms
10 Hz to 100 kHz
VO(V12) > 90%, ILOAD(V12) = 10 A to 95 mA
tST(V12)
Startup time(2)(4)
VIO1V8 pin = 0 V to VVIO, or VIO1V8 pin = VVIO and
500
s
WRFON pin = VVIO and r[PSCNT12](7) = 0 to 1
VO(V12) < 10%, ILOAD(V12) = 0 mA,
tF(V12)
Output voltage falling time(4)
5
ms
DVIO1V8 pin = VVIO to 0 V, or r[PSCNT12] = 1 to 0
V_LNA_FEM
V12_V28RX is on ILOAD(V_LNA_FEM) = 30 mA,
VO(V_LNA_FEM)
Output voltage(2)
2.71
2.83
2.89
V
ILOAD(V12) = 0 mA
IO(V_LNA_FEM)
Maximum output current(2)
V12_V28RX is on
30
mA
VO(V_LNA_FEM) > 90%, ILOAD(V_LNA_FEM) = 0 mA,
TST(V_LNA_FEM)
Startup time(2)(4)
r[PSCNT12] = 1 and r[PSCNTR3V](5) = 1 and
5
s
WRFON pin = 0 V to VVIO
VO(V_LNA_FEM) < 10%, ILOAD(V_LNA_FEM) = 0 mA
,VIO1V8 pin = VVIO to 0 V, or
TF(V_LNA_FEM)
Output voltage falling time(2)
1.5
ms
r[PSCNT12] = 1 to 0(4), or
r[PSCNTR3V] = 1 to 0(4)
(1)
Total accuracy includes line and load regulation, temperature and process condition. It does not include load and line transients
(2)
Normal mode operation
(3)
Shutdown current include V11_V28TX, V13_V28A and V15_V18A
(4)
Not Production tested. Specified by using the reference EVM.
(5)
The margin up to 2.7 V extends to the output voltage if COV12 is changed to 4.7
F. Specified by using the reference EVM.
(6)
Ripple voltage = 0.1 VPP
(7)
r[PSCNT12] is a name of register command by serial interface. r[PSCNTR3V] is a name of register command by serial interface. The
name of switch is a R3V and the name of output pin is V_LNA_FEM.
10
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