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参数资料
| 型号： | TPS659107A1RSL |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封装： | 6 X 6 MM, 1 MM HEIGHT, 0.40 MM PITCH, PLASTIC, VQFN-48 |
| 文件页数： | 74/93页 |
| 文件大小： | 1014K |
| 代理商： | TPS659107A1RSL |
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SWCS046I
– MARCH 2010 – REVISED JULY 2011
Bits
Field Name
Description
Type
Reset
2
VDD2_KEEPON
If VDD2_EN1
&2 control bit = 0 (default setting):
RW
0
When 1, VDD2 SMPS PWM mode is maintained during device SLEEP
state. No effect if VDD2 working mode is PFM.
When 0, VDD2 SMPS PFM mode is set during device SLEEP state.
1
VDD1_KEEPON
If VDD1_EN1
&2 control bit=0 (default setting):
RW
0
When 1, VDD1 SMPS PWM mode is maintained during device SLEEP
state. No effect if VDD1 working mode is PFM.
When 0, VDD1 SMPS PFM mode is set during device SLEEP state.
0
VIO_KEEPON
If VIO_EN1
&2 control bit=0 (default setting): When 1, VIO SMPS PWM
RW
0
mode is maintained during device SLEEP state. No effect if VIO working
mode is PFM.
When 0, VIO SMPS PFM mode is set during device SLEEP state.
Table 66. SLEEP_SET_LDO_OFF_REG
Address Offset
0x43
Physical Address
Instance
Description
Configuration Register turning-off LDO regulator during the SLEEP state of the device.
Corresponding *_KEEP_ON control bit in SLEEP_KEEP_RES_ON register should be 0 to make this
*_SET_OFF control bit effective
Type
RW
7
6
5
4
3
2
1
0
VPLL_SETOFF
VDIG2_SETOFF
VDIG1_SETOFF
VMMC_SETOFF
VDAC_SETOFF
VAUX2_SETOFF
VAUX1_SETOFF
VAUX33_SETOFF
Bits
Field Name
Description
Type
Reset
7
VDAC_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
6
VPLL_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
5
VAUX33_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
4
IVAUX2_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
3
VAUX1_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
2
VDIG2_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
1
VDIG1_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
0
VMMC_SETOFF
When 1, LDO regulator is turned off during device SLEEP state.
RW
0
When 0, No effect
Table 67. SLEEP_SET_RES_OFF_REG
Address Offset
0x44
Physical Address
Instance
Description
Configuration Register turning-off SMPS regulator during the SLEEP state of the device.
Corresponding *_KEEP_ON control bit in SLEEP_KEEP_RES_ON2 register should be 0 to make this
*_SET_OFF control bit effective. Supplies voltage expected after their wake-up (SLEEP to ACTIVE state
transition) can also be programmed.
Type
RW
76
Copyright
2010–2011, Texas Instruments Incorporated
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