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参数资料
型号： TSC87C51-L16IEB
厂商： ATMEL CORP
元件分类： 微控制器/微处理器
英文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP44
封装： 1.40 MM HEIGHT, VQFP-44
文件页数： 152/176页
文件大小： 2962K
代理商： TSC87C51-L16IEB
77
2535J–AVR–08/10
ATtiny13
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than fclk_I/O/2.5.
An external clock source can not be prescaled.
Figure 12-2. Prescaler for Timer/Counter0
Note:
1. The synchronization logic on the input pins (
T0) is shown in Figure 12-1 on page 76.
12.4 Register Description.
12.4.1
GTCCR – General Timer/Counter Control Register
Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR10 bit is kept, hence keeping the Prescaler Reset signal asserted.
This ensures that the Timer/Counter is halted and can be configured without the risk of advanc-
ing during configuration. When the TSM bit is written to zero, the PSR10 bit is cleared by
hardware, and the Timer/Counter start counting.
Bit 0 – PSR10: Prescaler Reset Timer/Counter0
When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared
immediately by hardware, except if the TSM bit is set.
PSR10
Clear
clk
T0
T0
clk
I/O
Synchronization
Bit
7
6
5
4
3
2
1
0
TSM
–
PSR10
GTCCR
Read/Write
R/W
R
R/W
Initial Value
0
相关PDF资料
PDF描述
TSC87C51-20CBR 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PQCC44
TSC87C51-25CIB 8-BIT, OTPROM, 25 MHz, MICROCONTROLLER, CQCC44
TSC87C51-33CBB 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PQCC44
TSC87C52-33CDB 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PQFP44
T89C51RD2-3CVCM 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40
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