参数资料
型号: TSC87C51-L16IEB
厂商: ATMEL CORP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP44
封装: 1.40 MM HEIGHT, VQFP-44
文件页数: 164/176页
文件大小: 2962K
代理商: TSC87C51-L16IEB
88
2535J–AVR–08/10
ATtiny13
The ADC is optimized for analog signals with an output impedance of approximately 10 k
Ω or
less. If such a source is used, the sampling time will be negligible. If a source with higher imped-
ance is used, the sampling time will depend on how long time the source needs to charge the
S/H capacitor, with can vary widely. The user is recommended to only use low impedant sources
with slowly varying signals, since this minimizes the required charge transfer to the S/H
capacitor.
Signal components higher than the Nyquist frequency (fADC/2) should not be present to avoid
distortion from unpredictable signal convolution. The user is advised to remove high frequency
components with a low-pass filter before applying the signals as inputs to the ADC.
14.9 Analog Noise Canceling Techniques
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of
analog measurements. When conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
Keep analog signal paths as short as possible.
Make sure analog tracks run over the analog ground plane.
Keep analog tracks well away from high-speed switching digital tracks.
If any port pin is used as a digital output, it mustn’t switch while a conversion is in progress.
Place bypass capacitors as close to VCC and GND pins as possible.
Where high ADC accuracy is required it is recommended to use ADC Noise Reduction Mode, as
described in Section 14.7 on page 87. This is especially the case when system clock frequency
is above 1 MHz. A good system design with properly placed, external bypass capacitors does
reduce the need for using ADC Noise Reduction Mode
14.10 ADC Accuracy Definitions
An n-bit single-ended ADC converts a voltage linearly between GND and VREF in 2n steps
(LSBs). The lowest code is read as 0, and the highest code is read as 2n-1.
Several parameters describe the deviation from the ideal behavior:
相关PDF资料
PDF描述
TSC87C51-20CBR 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PQCC44
TSC87C51-25CIB 8-BIT, OTPROM, 25 MHz, MICROCONTROLLER, CQCC44
TSC87C51-33CBB 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PQCC44
TSC87C52-33CDB 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PQFP44
T89C51RD2-3CVCM 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40
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