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参数资料
| 型号： | TSPC603PMAB/C8ME |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, CQFP240 |
| 封装： | CERQUAD-240 |
| 文件页数： | 6/38页 |
| 文件大小： | 704K |
| 代理商： | TSPC603PMAB/C8ME |
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TSPC603p
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3.5. Power consideration
The PowerPC603p is a microprocessor specifically designed for low-power operation. As the 603e microprocessor version, the 603p
provides both automatic and program-controllable power reduction modes for progressive reduction of power consumption. This
chapter describes the hardware support provided by the 603p for power management.
3.5.1. Dynamic Power Management
Dynamic power management automatically powers up and down the individual execution units of the 603p, based upon the contents
of the instruction stream. For example, if no floating-point instructions are being executed, the floating-point unit is automatically pow-
ered down. Power is not actually removed from the execution unit ; instead, each execution unit has an independent clock input,
which is automatically controlled on a clock-by- clock basis. Since CMOS circuits consume negligible power when they are not
switching, stopping the clock to an execution unit effectively eliminates its power consumption. The operation of DPM is completely
transparent to software or any external hardware. Dynamic power management is enabled by setting bit 11 in HID0 on power-up, of
following HRESET.
3.5.2. Programmable Power Modes
The 603p provides four programmable power states - full power, doze, nap and sleep. Software selects these modes by setting one
(and only one) of the three power saving mode bits. Hardware can enable a power management state through external asynchronous
interrupts The hardware interrupt causes the transfer of program flow to interrupt handler code. The appropriate mode is then set by
the software. The 603p provides a separate interrupt and interrupt vector for power management - the system management interrupt
(SMI). The 603p also contains a decrement timer which allows it to enter the nap or doze mode for a predetermined amount of time
and then return to full power operation through the decrementer interrupt (DI). Note that the 603p cannot switch from on power man-
agement mode to another without first returning to full on mode. The nap and sleep modes disable bus snooping ; therefore, a hard-
ware handshake is provided to ensure coherency before the 603p enters these power management modes. Table 7 summarizes the
four power states.
Table 7 : Power PC 603p Microprocessor Programmable Power Modes
PM Mode
Functioning Units
Activation Method
Full-Power Wake Up Method
Full power
All units active
–
Full power (with DPM)
Requested logic by
demand
By instruction dispatch
–
Doze
- Bus snooping
- Data cache as needed
- Decrementer timer
Controlled by SW
External asynchronous exceptions*
Decrementer interrupt
Reset
Nap
Decrementer timer
Controlled by hardware and
software
External asynchronous exceptions
Decrementer interrupt
Reset
Sleep
None
Controlled by hardware and
software
External asynchronous exceptions
Reset
* Exceptions are referred to as interrupts in the architecture specification
3.5.3. Power Management Modes
The following sections describe the characteristics of the 603p”s power management modes, the requirements for entering and exit-
ing the various modes, and the system capabilities provided by the 603p while the power management modes are active.
3.5.3.1. Full-Power Mode with DPM Disabled
Full-power mode with DPM disabled power mode is selected when the DPM enable bit (bit 11) in HID0 is cleared.
- Default state following power-up and HRESET.
- All functional units are operating at full processor speed at all times.
3.5.3.2. Full-Power Mode with DPM Enabled
Full-power mode with DPM enabled (HID0[11] = 1) provides on-chip power management without affecting the functionality or perfor-
mance of the 603p.
- Required functional units are operating at full processor speed.
- Functional units are clocked only when needed.
- No software or hardware intervention required after mode is set.
- Software/hardware and performance transparent.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TSPC603R | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RCAB/Q8L | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RCAB/Q8LC | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RMAB/Q8L | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RMAB/Q8LC | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
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