参数资料
型号: TVP5150AEVM
厂商: Texas Instruments
文件页数: 15/74页
文件大小: 0K
描述: TVP5150AEVM
标准包装: 1
主要目的: 视频,视频解码器
已用 IC / 零件: TVP5150A
主要属性: NTSC/PAL 数字视频解码器
次要属性: 图形用户接口,I²C 接口
已供物品: 2 个板,线缆,CD,电源
配用: 296-23058-ND - EVAL MODULE FOR DM642
相关产品: TVP5150PBSR-ND - IC NTSC/PAL/SECAM DECODER 32TQFP
TVP5150APBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP
TVP5150AM1ZQCR-ND - IC VIDEO DECODER 8BIT 48BGA
TVP5150AM1PBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP
TVP5150AM1PBSG4-ND - IC VIDEO DECODER 8BIT 32TQFP
296-32781-ND - IC VIDEO DECODER 8BIT 32TQFP
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296-23025-6-ND - IC VIDEO DECODER 32-TQFP
更多...
212
2.17 Genlock Control and RTC
A Genlock control (GLCO) function is provided to support a standard video encoder to synchronize its internal color
oscillator for properly reproduced color with unstable timebase sources like VCRs.
The frequency control word of the internal color subcarrier digital control oscillator (DTO) and the subcarrier phase
reset bit are transmitted via terminal 23 (GLCO). The frequency control word is a 23-bit binary number. The frequency
of the DTO can be calculated from the following equation:
dto
ctrl
sclk
F
=
x
23
2
where Fdto is the frequency of the DTO, Fctrl is the 23-bit DTO frequency control, and Fsclk is the frequency of the
SCLK.
2.17.1 TVP5150A Genlock Control Interface
A write of 1 to bit 4 of the chrominance control register at I2C subaddress 1Ah causes the subcarrier DTO phase reset
bit to be sent on the next scan line on GLCO. The active low reset bit occurs 7 SCLKs after the transmission of the
last bit of DCO frequency control. Upon the transmission of the reset bit, the phase of the TVP5150A internal
subcarrier DCO is reset to zero.
A Genlock slave device can be connected to the GLCO terminal and uses the information on GLCO to synchronize
its internal color phase DCO to achieve clean line and color lock.
Figure 26 shows the timing diagram of the GLCO mode.
SCLK
GLCO
23-Bit Frequency Control
Start Bit
DCO Reset Bit
MSB
>128 SCLK
1 SCLK
7 SCLK
23 SCLK
1 SCLK
LSB
22
21
0
Figure 26. GLCO Timing
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