参数资料
型号: TVP5150AEVM
厂商: Texas Instruments
文件页数: 53/74页
文件大小: 0K
描述: TVP5150AEVM
标准包装: 1
主要目的: 视频,视频解码器
已用 IC / 零件: TVP5150A
主要属性: NTSC/PAL 数字视频解码器
次要属性: 图形用户接口,I²C 接口
已供物品: 2 个板,线缆,CD,电源
配用: 296-23058-ND - EVAL MODULE FOR DM642
相关产品: TVP5150PBSR-ND - IC NTSC/PAL/SECAM DECODER 32TQFP
TVP5150APBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP
TVP5150AM1ZQCR-ND - IC VIDEO DECODER 8BIT 48BGA
TVP5150AM1PBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP
TVP5150AM1PBSG4-ND - IC VIDEO DECODER 8BIT 32TQFP
296-32781-ND - IC VIDEO DECODER 8BIT 32TQFP
296-32780-ND - IC VIDEO DECODER 8BIT 48BGA
296-27133-ND - IC VIDEO DECODER 8BIT 32TQFP
296-23026-6-ND - IC VIDEO DECODER 48-BGA
296-23025-6-ND - IC VIDEO DECODER 32-TQFP
更多...
247
2.20.57 Interrupt Configuration Register A
Address
C2h
Default
04h
7
6
5
4
3
2
1
0
Reserved
YCbCr enable
(VDPOE)
Interrupt A
Interrupt polarity A
YCbCr enable (VDPOE):
0 = YCbCr pins are high impedance.
1 = YCbCr pins are active if other conditions are met (default).
Interrupt A (read-only):
0 = Interrupt A is not active on the external pin (default).
1 = Interrupt A is active on the external pin.
Interrupt polarity A:
0 = Interrupt A is active low (default).
1 = Interrupt A is active high.
Interrupt configuration register A is used to configure the polarity of the external interrupt terminal. When interrupt
A is configured as active low, the terminal is driven low when active and high-impedance when inactive (open
collector). Conversely, when the terminal is configured as active high, it is driven high when active and driven low
when inactive.
2.20.58 VDP Configuration RAM Register
Address
C3h
C4h
C5h
Default
DCh
0Fh
00h
Address
7
6
5
4
3
2
1
0
C3h
Configuration data
C4h
RAM address (7:0)
C5h
Reserved
RAM
address 8
The configuration RAM data is provided to initialize the VDP with initial constants. The configuration RAM is 512 bytes
organized as 32 different configurations of 16 bytes each. The first 12 configurations are defined for the current VBI
standards. An additional 2 configurations can be used as a custom programmed mode for unique standards like
Gemstar.
Address C3h is used to read or write to the RAM. The RAM internal address counter is automatically incremented
with each transaction. Addresses C5h and C4h make up a 9-bit address to load the internal address counter with a
specific start address. This can be used to write a subset of the RAM for only those standards of interest. Registers
D0hFBh must all be programmed with FFh, before writing or reading the configuration RAM. Full field mode (CFh)
must be disabled as well.
The suggested RAM contents are shown below. All values are hexadecimal.
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