参数资料
型号: UDA1380TT
厂商: NXP SEMICONDUCTORS
元件分类: 消费家电
英文描述: Stereo audio coder-decoder for MD, CD and MP3
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO32
封装: 6.10 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT-487-1, TSSOP-32
文件页数: 44/68页
文件大小: 426K
代理商: UDA1380TT
2004 Apr 22
49
NXP Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
11.17 Decimator read-out
Table 67 Register address 28H
Table 68 Description of register bits
4SDETR1
Interpolator silence detect channel 1 right. When this bit is logic 0:
interpolator on channel 1 right input has detected no silence. When this bit is
logic 1: interpolator on channel 1 right input has detected silence.
3SDETL1
Interpolator silence detect channel 1 left. When this bit is logic 0:
interpolator on channel 1 left input has detected no silence. When this bit is
logic 1: interpolator on channel 1 left input has detected silence.
2
MUTE_STATE_M
Interpolator muting. A 1-bit value which signals whether the interpolator has
reached mute or not. When this bit is logic 0: interpolator is not muted. When
this bit is logic 1: interpolator is muted.
1
MUTE_STATE_CH2
Interpolator muting channel 2. When this bit is logic 0: interpolator channel 2
is not muted. When this bit is logic 1: interpolator channel 2 is muted.
0
MUTE_STATE_CH1
Interpolator muting channel 1. When this bit is logic 0: interpolator channel 1
is not muted. When this bit is logic 1: interpolator channel 1 is muted.
BIT
151413
12
11
10
9
8
Symbol
BIT
765
4
3
2
1
0
Symbol
AGC_STAT
MT_ADC_STAT
OVERFLOW
BIT
SYMBOL
DESCRIPTION
15 to 5
not used
4AGC_STAT
AGC gain status. A 1-bit value which signals whether the AGC gain exceeds
8 dB or not. Only valid when the AGC is switched on. When this bit is logic 0:
AGC gain <8 dB. When this bit is logic 1: AGC gain
≥8dB.
3
not used
2
MT_ADC_STAT
Decimator mute. A 1-bit value which signals whether the decimator has
reached mute or not. When this bit is logic 0: decimator has not muted. When
this bit is logic 1: decimator has muted.
1
not used
0
OVERFLOW
Digital output overflow detection. A 1-bit value which signals whether the
digital output amplitude exceeds
1.16 dB or not. When this bit is logic 0: no
overflow detected (read-out). When this bit is logic 1: overflow detected
(read-out).
BIT
SYMBOL
DESCRIPTION
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