- 您现在的位置：买卖IC网 > PDF目录225499 > V58C2128404SBLT6I (PROMOS TECHNOLOGIES INC) 32M X 4 DDR DRAM, 0.7 ns, PDSO66 PDF资料下载
参数资料
| 型号： | V58C2128404SBLT6I |
| 厂商： | PROMOS TECHNOLOGIES INC |
| 元件分类： | DRAM |
| 英文描述： | 32M X 4 DDR DRAM, 0.7 ns, PDSO66 |
| 封装： | 0.400 X 0.875 INCH, PLASTIC, MS-024FC, TSOP2-66 |
| 文件页数： | 43/60页 |
| 文件大小： | 915K |
| 代理商： | V58C2128404SBLT6I |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页当前第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
48
V58C2128(804/404/164)SB*I Rev. 1.3 March 2006
ProMOS TECHNOLOGIES
V58C2128(804/404/164)SB*I
Figure 38 - INITIALIZE AND MODE REGISTER SETS
CKE
LVCMOS LOW LEVEL
DQ
BA0, BA1
200 cycles of CLK**
Extended
Mode
Register
Set
Load
Mode
Register,
Reset DLL
(with A8 = H)
Load
Mode
Register
(with A8 = L)
tMRD
tRP
tRFC
t IS
Power-up:
VDD and
CLK stable
T = 200
s
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
High-Z
tIH
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
DM
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
DQS
High-Z
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
A0-A9, A11
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
A10
ALL BANKS
DON'T CARE
CK
/CK
tCK
tCH
tCL
VTT
(system*)
t VTD
VREF
VDD
VDDQ
COMMAND
MRS
NOP
PRE
EMRS
AR
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
AR
tIS tIH
BA0=H,
BA1=L
tIS tIH
BA0=L,
BA1=L
tIS tIH
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
CODE
tIS tIH
CODE
MRS
BA0=L,
BA1=L
CODE
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
PRE
ALL BANKS
tIS tIH
RA
ACT
BA
* = VTT is not applied directly to the device, however tVTD must be greater than or equal to zero to avoid device latch-up.
** = tMRD is required before any command can be applied, and 200 cycles of CK are required before a READ command can be applied.
The two Auto Refresh commands may be moved to follow the first MRS, but precede the second PRECHARGE ALL command.
(
)
(
)
(
)
(
)
CODE
相关PDF资料 |
PDF描述 |
|---|---|
| V58C365164S5 | 4M X 16 DDR DRAM, 0.1 ns, PDSO66 |
| V608ME06 | VCO, 1900 MHz - 2270 MHz |
| V603ME07 | VCO, 1896 MHz - 1924 MHz |
| V6049001 | VCO, 1600 MHz - 2200 MHz |
| V610ME04 | VCO, 1950 MHz - 2150 MHz |
相关代理商/技术参数 |
参数描述 |
|---|---|
| V58C2128804S | 制造商:MOSEL 制造商全称:MOSEL 功能描述:HIGH PERFORMANCE 2.5 VOLT 128 Mbit DDR SDRAM |
| V58C2256 | 制造商:MOSEL 制造商全称:MOSEL 功能描述:HIGH PERFORMANCE 2.5 VOLT 256 Mbit DDR SDRAM |
| V58C2256164S | 制造商:MOSEL 制造商全称:MOSEL 功能描述:HIGH PERFORMANCE 2.5 VOLT 256 Mbit DDR SDRAM |
| V58C2256324SAB30 | 制造商:Marvell 功能描述:Marvell V58C2256324SAB30 |
| V58C2256324SAB33 | 制造商:Marvell 功能描述:Marvell V58C2256324SAB33 |
发布紧急采购，3分钟左右您将得到回复。