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参数资料
| 型号： | W25Q80BVSFIG |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 1M X 8 SPI BUS SERIAL EEPROM, PDSO16 |
| 封装： | 0.300 INCH, GREEN, PLASTIC, SOIC-16 |
| 文件页数： | 17/72页 |
| 文件大小： | 1878K |
| 代理商： | W25Q80BVSFIG |
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W25Q80BV
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To complete the Write Status Register instruction, the /CS pin must be driven high after the eighth or
sixteenth bit of data that is clocked in. If this is not done the Write Status Register instruction will not be
executed. If /CS is driven high after the eighth clock (compatible with the 25X series) the CMP, QE and
SRP1 bits will be cleared to 0.
During non-volatile Status Register write operation (06h combined with 01h), after /CS is driven high, the
self-timed Write Status Register cycle will commence for a time duration of tW (See AC Characteristics).
While the Write Status Register cycle is in progress, the Read Status Register instruction may still be
accessed to check the status of the BUSY bit. The BUSY bit is a 1 during the Write Status Register cycle
and a 0 when the cycle is finished and ready to accept other instructions again. After the Write Status
Register cycle has finished, the Write Enable Latch (WEL) bit in the Status Register will be cleared to 0.
During volatile Status Register write operation (50h combined with 01h), after /CS is driven high, the
Status Register bits will be refreshed to the new values within the time period of tSHSL2 (See AC
Characteristics). BUSY bit will remain 0 during the Status Register bit refresh period.
Please refer to 10.1 for detailed Status Register Bit descriptions. Factory default for all status Register
bits are 0.
15 14 13 12 11 10
9
8
Status Register 1
Status Register 2
15 14 13 12 11 10
9
8
Status Register 1
Status Register 2
Figure 8. Write Status Register Instruction Sequence Diagram
相关PDF资料 |
PDF描述 |
|---|---|
| W25X32AVZPIG | 4M X 8 FLASH 2.7V PROM, PDSO8 |
| W25X32AVSFIG | 4M X 8 FLASH 2.7V PROM, PDSO16 |
| W26L04AJ-12I | 256K X 16 STANDARD SRAM, 12 ns, PDSO44 |
| W26L04AH-10 | 256K X 16 STANDARD SRAM, 10 ns, PDSO44 |
| W28A | CERPAC, 28 LEAD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q80BVSNAG | 制造商:WINBOND 制造商全称:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVSNAP | 制造商:WINBOND 制造商全称:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVSNIG | 功能描述:IC SPI FLASH 8MBIT 8SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:2,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 异步 存储容量:256K (32K x 8) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:28-TSSOP（0.465"，11.8mm 宽） 供应商设备封装:28-TSOP 包装:带卷 (TR) 其它名称:71V256SA15PZGI8 |
| W25Q80BVSNIG TR | 制造商:Winbond Electronics Corp 功能描述: 制造商:Winbond Electronics Corp 功能描述:IC FLASH 8MBIT 104MHZ 8SOIC |
| W25Q80BVSNIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
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