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| 型号： | W28J800BT90L |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 512K X 16 FLASH 2.7V PROM, 90 ns, PDSO48 |
| 封装： | 12 X 20 MM, TSOP-48 |
| 文件页数： | 5/49页 |
| 文件大小： | 1527K |
| 代理商： | W28J800BT90L |
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W28J800B/T
Publication Release Date: April 11, 2003
- 13 -
Revision A4
The CUI does not occupy an addressable memory location. A write occurs when #WE and #CE are
active (low). The address and data needed to execute a command are latched on the rising edge of
#WE or #CE (whichever goes high first). Standard microprocessor write timings are used.
Figures 18 and 19 illustrate #WE and #CE controlled write operations.
9. COMMAND DEFINITIONS
When VPP ≤ VPPLK, read operations from the status register, identifier codes, or blocks are enabled.
Setting VPPH1/2 = VPP enables successful block erase, full chip erase, word/byte write and lock-bit
configuration operations.
Device operations are selected by writing specific commands into the CUI. Table 3 defines these
commands.
Table 2.1. Bus Operations (#BYTE = VIH) (Note 1, 2)
MODE
#RESET
#CE
#OE
#WE
ADDRESS
VPP
DQ0-15
RY/#BY(3)
Read (Note 8)
VIH
VIL
VIH
X
DOUT
X
Output Disable
VIH
VIL
VIH
X
High Z
X
Standby
VIH
X
High Z
X
Reset (note 4)
VIL
X
High Z
Read Identifier Codes
(Note 8)
VIH
VIL
VIH
See
Figure 4, 5
X
Note 5
High Z
Write (Note 6, 7, 8)
VIH
VIL
VIH
VIL
X
DIN
X
Table 2.2. Bus Operations (#BYTE = VIL) (Note 1, 2)
MODE
#RESET
#CE
#OE
#WE
ADDRESS
VPP
DQ0-15
RY/#BY(3)
Read (Note 8)
VIH
VIL
VIH
X
DOUT
X
Output Disable
VIH
VIL
VIH
X
High Z
X
Standby
VIH
X
High Z
X
Reset (note 4)
VIL
X
High Z
Read Identifier Codes
(Note 8)
VIH
VIL
VIH
See
Figure 4, 5
X
Note 5
High Z
Write (Note 6, 7, 8)
VIH
VIL
VIH
VIL
X
DIN
X
Notes:
1. Refer to DC Characteristics. When VPP ≤ VPPLK, memory contents can be read, but not altered.
2. X can be VIL or VIH for control pins and addresses, and VPPLK or VPPH1/2 for VPP. See DC Characteristics for VPPLK voltages.
3. RY/#BY is VOL when the WSM is executing internal block erase, full chip erase, word/byte write or lock-bit configuration
algorithms. It is High Z during when the WSM is not busy, in block erase suspend mode (with word/byte write inactive),
word/byte write suspend mode or reset mode.
4. #RESET at VSS ±0.2V ensures the lowest power consumption.
5. See Read Identifier Codes Command section for details.
6. Command writes involving block erase, full chip erase, word/byte write or lock-bit configuration are reliably executed when
VPP = VPPH1/2 and VDD = 2.7V to 3.6V.
7. Refer to Table 3 for valid DIN during a write operation.
8. Never hold #OE low and #WE low at the same timing.
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