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| 型号： | W9412G6IH-5 |
| 厂商： | Winbond Electronics |
| 文件页数： | 4/53页 |
| 文件大小： | 0K |
| 描述： | IC DDR-400 SDRAM 128MB 66TSSOPII |
| 标准包装： | 108 |
| 格式 - 存储器： | RAM |
| 存储器类型： | DDR SDRAM |
| 存储容量： | 128M（8Mx16） |
| 速度： | 250MHz |
| 接口： | 并联 |
| 电源电压： | 2.3 V ~ 2.7 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 66-TSSOP（0.400"，10.16mm 宽） |
| 供应商设备封装： | 66-TSOP II |
| 包装： | 托盘 |
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W9412G6IH
1. GENERAL DESCRIPTION
W9412G6IH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR
SDRAM); organized as 2M words × 4 banks × 16 bits. W9412G6IH delivers a data bandwidth of up to
500M words per second (-4). To fully comply with the personal computer industrial standard,
W9412G6IH is sorted into the following speed grades: -4, -5, -5I, -6 and -6I. The -4 is compliant to the
DDR500/CL3 and CL4 specification. The -5/-5I is compliant to the DDR400/CL3 specification (the -5I
grade which is guaranteed to support -40°C ~ 85°C). The -6/-6I is compliant to the DDR333/CL2.5
specification (the -6I grade which is guaranteed to support -40°C ~ 85°C).
All Input reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference
point for the differential clock is when the CLK and CLK signals cross during a transition. Write and
Read data are synchronized with the both edges of DQS (Data Strobe).
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W9412G6IH is ideal for main memory in
high performance applications.
2. FEATURES
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2.5V ± 0.2V Power Supply for DDR333/400
2.5V ± 0.1V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture; two data transfers per clock cycle
Differential clock inputs (CLK and CLK )
DQS is edge-aligned with data for Read; center-aligned with data for Write
CAS Latency: 2, 2.5, 3 and 4
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
15.6μS Refresh interval (4K/64 mS Refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant
Publication Release Date: Sep. 16, 2009
-4-
Revision A06
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9412G6JH | 制造商:WINBOND 制造商全称:Winbond 功能描述:2M ? 4 BANKS ? 16 BITS DDR SDRAM |
| W9412G6JH-4 | 制造商:Winbond Electronics Corp 功能描述:8*16B DDR1 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 128M 250MHZ 66TSOP |
| W9412G6JH-5 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 128M-Bit 8Mx16 2.5V 66-Pin TSOP 制造商:Winbond Electronics Corp 功能描述:128M BIT DDR1 |
| W9412G6JH-5I | 功能描述:IC DDR SDRAM 128MBIT 66TSOPII RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
| W9412G6JH-5TR | 制造商:Winbond Electronics Corp 功能描述:128M DDR SDRAM X16 200MHZ, 65N |
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