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参数资料
| 型号： | W9464G2IB-4 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 512K X 32 DDR DRAM, 0.6 ns, PBGA144 |
| 封装： | 12 X 12 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LFBGA-144 |
| 文件页数： | 3/49页 |
| 文件大小： | 886K |
| 代理商： | W9464G2IB-4 |
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W9464G2IB
Publication Release Date: Aug. 06, 2009
- 11 -
Revision A01
7.2 Command Function
7.2.1
Bank Activate Command
( RAS = “L”, CAS = “H”, WE = “H”, BA0, BA1 = Bank, A0 to A10 = Row Address)
The Bank Activate command activates the bank designated by the BA (Bank address) signal. Row
addresses are latched on A0 to A10 when this command is issued and the cell data is read out of
the sense amplifiers. The maximum time that each bank can be held in the active state is specified
as tRAS (max). After this command is issued, Read or Write operation can be executed.
7.2.2
Bank Precharge Command
( RAS = “L”, CAS = “H”, WE = “L”, BA0, BA1 = Bank, A8 = “L”, A0 to A7, A9, A10 = Don’t
Care)
The Bank Precharge command percharges the bank designated by BA. The precharged bank is
switched from the active state to the idle state.
7.2.3
Precharge All Command
( RAS = “L”, CAS = “H”, WE = “L”, BA0, BA1 = Don’t Care, A8 = “H”, A0 to A7, A9, A10 =
Don’t Care)
The Precharge All command precharges all banks simultaneously. Then all banks are switched to
the idle state.
7.2.4
Write Command
( RAS = “H”, CAS = “L”, WE = “L”, BA0, BA1 = Bank, A8 = “L”, A0 to A7 = Column Address)
The write command performs a Write operation to the bank designated by BA. The write data are
latched at both edges of DQS. The length of the write data (Burst Length) and column access
sequence (Addressing Mode) must be in the Mode Register at power-up prior to the Write
operation.
7.2.5
Write with Auto-precharge Command
( RAS = “H”, CAS = “L”, WE = “L”, BA0, BA1 = Bank, A8 = “H”, A0 to A7 = Column Address)
The Write with Auto-precharge command performs the Precharge operation automatically after the
Write operation. This command must not be interrupted by any other commands.
7.2.6
Read Command
( RAS = “H”, CAS = “L”, WE = “H”, BA0, BA1 = Bank, A8 = “L”, A0 to A7 = Column Address)
The Read command performs a Read operation to the bank designated by BA. The read data are
synchronized with both edges of DQS. The length of read data (Burst Length), Addressing Mode
and CAS Latency (access time from CAS command in a clock cycle) must be programmed in the
Mode Register at power-up prior to the Read operation.
7.2.7
Read with Auto-precharge Command
( RAS = “H”, CAS = ”L”, WE = ”H”, BA0, BA1 = Bank, A8 = ”H”, A0 to A7 = Column Address)
The Read with Auto-precharge command automatically performs the Precharge operation after the
Read operation.
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PDF描述 |
|---|---|
| WCMA2016U4X | 128K x 16 STATIC RAM |
| WCMA2016U4X-FF70 | 128K x 16 STATIC RAM |
| WDPI-3425J3525J-12 | 3425 MHz(Tx), 3525 MHz(Rx), DUPLEXER |
| WE-256K8-150CM | 256K X 8 EEPROM 5V, 150 ns, CDIP32 |
| WED3DG6418V10D1I | 16M X 64 SYNCHRONOUS DRAM MODULE, DMA144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W9464G6IB | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M × 4 BANKS × 16 BITS DDR SDRAM |
| W9464G6IH | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M ?? 4 BANKS ?? 16 BITS DDR SDRAM |
| W9464G6JH | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M ? 4 BANKS ? 16 BITS DDR SDRAM |
| W9464G6JH-4 | 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 64M 200MHZ 66TSOP |
| W9464G6JH-5 | 制造商:Winbond Electronics Corp 功能描述:64MBIT DDRI 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 64M 200MHZ 66TSOP |
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